Keyword : System-on-Chip


µI/O Architecture: A Power-Aware Interconnect Circuit Design for SoC and SiP
Yusuke KANNO Hiroyuki MIZUNO Nobuhiro OODAIRA Yoshihiko YASU Kazumasa YANAGISAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 589-597
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
low-costSystem-on-ChipSoCSystem-in-PackageSiPhierarchical I/O designsignal-level convertersignal wall functionlow-powerinterconnect circuit
 Summary | Full Text:PDF

Prototyping of a 5 GHz WLAN Reconfigurable System-on-Chip
Spyridon BLIONAS Konstantinos MASSELOS Chrissavgi DRE Christos DROSOS Fragkiskos IEROMNIMON Dimitris METAFAS Thanasis PAGONIS Aristodemos PNEVMATIKAKIS Anna TATSAKI Theodor TRIMIS Adamandios VONTZALIDIS 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5 ; pp. 891-900
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
wireless LANsOFDMreconfigurableSystem-on-Chip
 Summary | Full Text:PDF