| Keyword : SoC
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An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm Keisuke SUGIURA Hiroki MATSUTANI | Publication:
Publication Date: 2021/06/01
Vol. E104-D
No. 6 ;
pp. 789-800
Type of Manuscript:
PAPER
Category: Computer System Keyword: SLAM, GMapping, SoC, FPGA, | | Summary | Full Text:PDF | |
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Recent Progress of Biomedical Processor SoC for Wearable Healthcare Application: A Review Masahiko YOSHIMOTO Shintaro IZUMI | Publication:
Publication Date: 2019/04/01
Vol. E102-C
No. 4 ;
pp. 245-259
Type of Manuscript:
INVITED PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: Keyword: healthcare, low-power, SoC, wearable, | | Summary | Full Text:PDF | |
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Analog and Digital Collaborative Design Techniques for Wireless SoCs Ryuichi FUJIMOTO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/02/01
Vol. E99-A
No. 2 ;
pp. 514-522
Type of Manuscript:
INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: Keyword: wireless, SoC, ISDB-T, 1-segmant broadcasting, TransferJet, Wireless LAN, spurious signal, digital pre-distortion, mismatch calibration, low power consumption, | | Summary | Full Text:PDF | |
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Multi-Core/Multi-IP Technology for Embedded Applications Naohiko IRIE Toshihiro HATTORI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2009/10/01
Vol. E92-C
No. 10 ;
pp. 1232-1239
Type of Manuscript:
INVITED PAPER (Special Section on Hardware and Software Technologies on Advanced Microprocessors)
Category: Keyword: SoC, multi-core, embedded system, platform, | | Summary | Full Text:PDF | |
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Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros Ryusuke NEBASHI Noboru SAKIMURA Tadahiko SUGIBAYASHI Naoki KASAI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C
No. 4 ;
pp. 417-422
Type of Manuscript:
Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: Keyword: MRAM, embedded memory, SoC, system LSI, | | Summary | Full Text:PDF | |
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On-Chip Multi-Channel Monitoring for Analog Circuit Diagnosis in Systems-on-Chip Integration Koichiro NOGUCHI Takushi HASHIDA Makoto NAGATA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C
No. 6 ;
pp. 1189-1196
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: Keyword: SoC, analog diagnosis, on-chip monitor, | | Summary | Full Text:PDF | |
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Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs Yuichi NAKAMURA Takeshi YOSHIMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A
No. 12 ;
pp. 3458-3463
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification Keyword: SoC, power consumption, power estimation, toggle rate, | | Summary | Full Text:PDF | |
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Hardware Design Verification Using Signal Transitions and Transactions Nobuyuki OHBA Kohji TAKANO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A
No. 4 ;
pp. 1012-1017
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: Keyword: hardware prototyping, hardware debugging, logic analyzer, ASIC, SoC, | | Summary | Full Text:PDF | |
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Low Latency Four-Flop Synchronizer with the Handshake Interface Suk-Jin KIM Jeong-Gun LEE Kiseon KIM | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D
No. 7 ;
pp. 1460-1463
Type of Manuscript:
Special Section LETTER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Communications and Wireless Systems Keyword: synchronizer, two-flop, clock domain, SoC, | | Summary | Full Text:PDF | |
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A Design of Real-Time JPEG Encoder for 1.4 Mega Pixel CMOS Image Sensor SoC Kyeong-Yuk MIN Jong-Wha CHONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A
No. 6 ;
pp. 1443-1447
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004))
Category: Keyword: CMOS image sensor, encoder, JPEG, one-chip camera, SoC, | | Summary | Full Text:PDF | |
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µI/O Architecture: A Power-Aware Interconnect Circuit Design for SoC and SiP Yusuke KANNO Hiroyuki MIZUNO Nobuhiro OODAIRA Yoshihiko YASU Kazumasa YANAGISAWA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C
No. 4 ;
pp. 589-597
Type of Manuscript:
Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: Keyword: low-cost, System-on-Chip, SoC, System-in-Package, SiP, hierarchical I/O design, signal-level converter, signal wall function, low-power, interconnect circuit, | | Summary | Full Text:PDF | |
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Packaging Technology Trends and Challenges for System-in-Package Akihiro DOHYA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2001/12/01
Vol. E84-C
No. 12 ;
pp. 1756-1762
Type of Manuscript:
INVITED PAPER (Special Issue on Integrated Systems with New Concepts)
Category: Keyword: packaging technology, system-in-package, SIP, SoC, CSP, | | Summary | Full Text:PDF | |
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