Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/12/01 Vol. E90-ANo. 12 ;
pp. 2810-2817 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: System Level Design Keyword: FPGA-based hardware emulators, SDRAM, memory controller, clock generator,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/25 Vol. E82-ANo. 11 ;
pp. 2347-2355 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: scheduling, CDFG, SDRAM, access modes, multiple banks,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1994/08/25 Vol. E77-CNo. 8 ;
pp. 1328-1333 Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories) Category: DRAM Keyword: synchronous DRAM, SDRAM, high speed DRAM, multiple-register,