Keyword : Mersenne Twister


Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element
Hiroshi YUASA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4 ; pp. 473-481
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
statistical static timing analysisdelay distributionslew ratefield-programmable gate arrayMersenne Twister
 Summary | Full Text:PDF

Design and Evaluation of Hardware Pseudo-Random Number Generator MT19937
Shiro KONUMA Shuichi ICHIKAWA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/12/01
Vol. E88-D  No. 12 ; pp. 2876-2879
Type of Manuscript:  LETTER
Category: VLSI Systems
Keyword: 
custom circuitsimulationrandom numberMersenne TwisterFPGA
 Summary | Full Text:PDF