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| Keyword : MTCMOS
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Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering Input Vector Pattern and Non-linear Current Model
Seidai TAKEDA Kyundong KIM Hiroshi NAKAMURA Kimiyoshi USAMI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A
No. 12 ;
pp. 2499-2509
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword:
power gating, MTCMOS, delay, leakage power, | | | Summary | Full Text:PDF | |
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Clock-Free MTCMOS Flip-Flops with High Speed and Low Power
Bong Hyun LEE Young Hwan KIM Kwang-Ok JEONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A
No. 6 ;
pp. 1416-1424
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004))
Category:
Keyword:
flip-flop, MTCMOS, multithreshold-voltage CMOS, | | | Summary | Full Text:PDF | |
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Dynamic Sleep Control for Finite-State-Machines to Reduce Active Leakage Power
Kimiyoshi USAMI Hiroshi YOSHIOKA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A
No. 12 ;
pp. 3116-3123
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword:
leakage power, scaling, active leakage, burn-in, MTCMOS, | | | Summary | Full Text:PDF | |
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