Keyword : MTCMOS


Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering Input Vector Pattern and Non-linear Current Model
Seidai TAKEDA Kyundong KIM Hiroshi NAKAMURA Kimiyoshi USAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12 ; pp. 2499-2509
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
power gatingMTCMOSdelayleakage power
 Summary | Full Text:PDF(2MB)

Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits
Shiho HAGIWARA Takashi SATO Kazuya MASU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4 ; pp. 1031-1038
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
device parameter variationMTCMOStiming analysisMonte-Carlo simulation
 Summary | Full Text:PDF(357.7KB)

Delay Modeling and Critical-Path Delay Calculation for MTCMOS Circuits
Naoaki OHKUBO Kimiyoshi USAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3482-3490
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification
Keyword: 
MTCMOSselective-MTstatic timing analysisleakage powerdelay modeling
 Summary | Full Text:PDF(1.1MB)

A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era
Kazutoshi KOBAYASHI Akihiko HIGUCHI Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6 ; pp. 838-843
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
sleep transistordecoupling capacitorMTCMOSlow power
 Summary | Full Text:PDF(442KB)

Clock-Free MTCMOS Flip-Flops with High Speed and Low Power
Bong Hyun LEE Young Hwan KIM Kwang-Ok JEONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A  No. 6 ; pp. 1416-1424
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004))
Category: 
Keyword: 
flip-flopMTCMOSmultithreshold-voltage CMOS
 Summary | Full Text:PDF(760.8KB)

Dynamic Sleep Control for Finite-State-Machines to Reduce Active Leakage Power
Kimiyoshi USAMI Hiroshi YOSHIOKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3116-3123
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
leakage powerscalingactive leakageburn-inMTCMOS
 Summary | Full Text:PDF(1.1MB)

A Power-Down Circuit Scheme Using Data-Preserving Complementary Pass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI
Ki-Tae PARK Tomokatsu MIZUKUSA Hyo-Sig WON Kyu-Myung CHOI Jeong-Taek KONG Hiroyuki KURINO Mitsumasa KOYANAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 645-648
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
low-powerMTCMOSdata-preservingcomplementary pass transistorpower-down circuit scheme
 Summary | Full Text:PDF(1MB)

Pipelined Wake-Up Scheme to Reduce Power Line Noise for Block-Wise Shutdown of Low-Power VLSI Systems
Jin-Hyeok CHOI Yong-Ju KIM Jae-Kyung WEE Seongsoo LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 629-633
Type of Manuscript:  Special Section LETTER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
shutdownwake-uppipelined structurepower stabilityMTCMOScut-off switchleakage power
 Summary | Full Text:PDF(1.5MB)

Selective Multi-Threshold Technique for High-Performance and Low-Standby Applications
Kimiyoshi USAMI Naoyuki KAWABE Masayuki KOIZUMI Katsuhiro SETA Toshiyuki FURUSAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12 ; pp. 2667-2673
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Optimization of Power and Timing
Keyword: 
high performancelow standby leakagemulti-thresholdMTCMOSW-CDMA
 Summary | Full Text:PDF(511.4KB)