IEICE Trans

Keyword : MPEG2

A 95 mW MPEG2 MP@HL Motion Estimation Processor Core for Portable High-Resolution Video Application Yuichiro MURACHI Koji HAMANO Tetsuro MATSUNO Junichi MIYAKOSHI Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 ; pp. 3492-3499 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: low power, motion estimation, MPEG2, HDTV, IP,
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Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol Yoshihiro OHTANI Nobuyuki KAWAHARA Hiroyuki NAKAOKA Tomonobu TOMARU Kazuhito MARUYAMA Toru CHIBA Takao ONOYE Isao SHIRAKAWA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2002/10/01 Vol. E85-B No. 10 ; pp. 2032-2043 Type of Manuscript: Special Section PAPER (Special Issue on Mobile Multimedia Communications) Category: Keyword: wireless, video, hybrid ARQ, IEEE 802.11b, MPEG2,
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Jitter Reduction in CBR MPEG-2 Transport Stream Packet Communications over Lossy ATM Network JongMoo SOHN JongIck LEE RyongBae DONG ByungRyul LEE MoonKey LEE
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1999/09/25 Vol. E82-B No. 9 ; pp. 1522-1530 Type of Manuscript: LETTER Category: Communication Networks and Services Keyword: CBR, MPEG2, sequence numbering, de-jitter, ATM network,
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A Lossless Handover Method for Video Transmission in Mobile ATM Networks and Its Experimental Evaluation Masaya NISHIO Noriteru SHINAGAWA Takehiko KOBAYASHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/07/25 Vol. E82-A No. 7 ; pp. 1194-1201 Type of Manuscript: Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks) Category: Keyword: mobile ATM network, handover, cell loss, cell delay variation, MPEG2, subjective assessment,
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System Electronics Technologies for Video Processing and Applications Tomio KISHIMOTO Hironori YAMAUCHI Ryota KASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/02/25 Vol. E82-A No. 2 ; pp. 197-205 Type of Manuscript: INVITED PAPER (Special Section on VLSI for Digital Signal Processing) Category: Keyword: video processing, MPEG2, parallel processing, VLSI processor architecture,
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Simulation Study on Multi-Hop Jitter Behavior in Integrated ATM Network with CATV and Internet Naotoshi ADACHI Shoji KASAHARA Yutaka TAKAHASHI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1998/12/25 Vol. E81-B No. 12 ; pp. 2413-2422 Type of Manuscript: Special Section PAPER (Special Issue on the Latest Development of Telecommunication Research) Category: QoS Control and Traffic Control Keyword: ATM, CATV, internet, MPEG2, multicast, jitter,
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A Chip Set for Programmable Real-Time MPEG2 MP@ML Video Encoder Tetsuya MATSUMURA Hiroshi SEGAWA Satoshi KUMAKI Yoshinori MATSUURA Atsuo HANAMI Kazuya ISHIHARA Shin-ichi NAKAGAWA Tadashi KASEZAWA Yoshihide AJIOKA Atsushi MAEDA Masahiko YOSHIMOTO Tadashi SUMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 680-694 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Keyword: video compression/decompression, video encoder, MPEG2, video signal processor,
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Polling-Based Real-Time Software for MPEG2 System Protocol LSIs Jiro NAGANUMA Makoto ENDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/25 Vol. E81-C No. 5 ; pp. 695-701 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Keyword: MPEG2, protocol processing, multiplexer/demultiplexer, real-time software, embedded system, HW/SW co-design, VLSI,
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A Balanced-Mesh Clock Routing Technique for Performance Improvement Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/08/25 Vol. E80-A No. 8 ; pp. 1489-1495 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: LSI, CAD, layout design, clock skew, partitioning, routing, MPEG2,
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Bits Truncation Adapteve Pyramid Algorithm for Motion Estimation of MPEG2 Li JIANG Kazuhito ITO Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/08/25 Vol. E80-A No. 8 ; pp. 1438-1445 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Keyword: bits truncation, adaptive, pyramid, motion estimation, MPEG2,
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Low Power Design Technology for Digital LSIs Tadayoshi ENOMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/12/25 Vol. E79-C No. 12 ; pp. 1639-1649 Type of Manuscript: INVITED PAPER (Special Issue on Low-Power LSI Technologies) Category: Keyword: power dissipation, active power dissipation, stand-by power dissipation, low power circuit technology, LSI, CMOS LSIs, GaAs LSIs, mlulti-media LSIs, video codec LSIs, signal handling capability, throughput, clock frequency, video signal processor, VSP, DSP. H.261, MPEG2,
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Single Chip Implementation of Motion Estimator Dedicated to MPEG2 MP＠HL Takao ONOYE Gen FUJITA Masamichi TAKATSU Isao SHIRAKAWA Nariyoshi YAMAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/08/25 Vol. E79-A No. 8 ; pp. 1210-1216 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Keyword: MPEG2, HDTV, VLSI, motion estimation,
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High-Throughput Technologies for Video Signal Processor (VSP) LSIs Tadayoshi ENOMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/04/25 Vol. E79-C No. 4 ; pp. 459-471 Type of Manuscript: INVITED PAPER (Special Issue on Ultra-High-Speed LSIs) Category: Keyword: video codec LSIs, video signal processor, VSP, DSP, video data encoding, decoding, H.261, MPEG2, power dissipation, throughtput,
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Single Chip Implementation of MPEG2 Decoder for HDTV Level Pictures Takao ONOYE Toshihiro MASAKI Yasuo MORIMOTO Yoh SATO Isao SHIRAKAWA Kenji MATSUMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/03/25 Vol. E79-A No. 3 ; pp. 330-338 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems) Category: Keyword: MPEG2, HDTV, VLSI, decorder ASIC,
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ULSI Realization of MPEG2 Realtime Video Encoder and Decoder--An Overview Masahiko YOSHIMOTO Shin-ichi NAKAGAWA Tetsuya MATSUMURA Kazuya ISHIHARA Shin-ichi URAMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/25 Vol. E78-C No. 12 ; pp. 1668-1681 Type of Manuscript: INVITED PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: video compression/decompression, video encoder, video decoder, MPEG2, video signal processor,
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An MPEG2 Video Decoder LSI with Hierarchical Control Mechanism Shin-ichi URAMOTO Akihiko TAKABATAKE Takashi HASHIMOTO Jun TAKEDA Gen-ichi TANAKA Tsuyoshi YAMADA Yukio KODAMA Atsushi MAEDA Toshiaki SHIMADA Shun-ichi SEKIGUCHI Tokumichi MURAKAMI Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/25 Vol. E78-C No. 12 ; pp. 1697-1708 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: image compression, video decoder, MPEG2,
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A 600 mW Single Chip MPEG2 Video Decoder Kiyoshi MIURA Hideki KOYANAGI Hiroshi SUMIHIRO Seiichi EMOTO Nozomu OZAKI Toshiro ISHIKAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/25 Vol. E78-C No. 12 ; pp. 1691-1696 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: MPEG2, video decoder, low power dual-port RAM, multiple-clock, asynchoronization,
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