Keyword : MPEG-4 codec LSI

A 160 mW, 80 nA Standby, MPEG-4 Audiovisual LSI with 16 Mbit Embedded DRAM and a 5 GOPS Post Filtering Unit
Hideho ARAKIDA Masafumi TAKAHASHI Yoshiro TSUBOI Tsuyoshi NISHIKAWA Hideaki YAMAMOTO Toshihide FUJIYOSHI Yoshiyuki KITASHO Yasuyuki UEDA Tetsuya FUJITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 475-481
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
MPEG-4 codec LSI, digital signal processing, 
 Summary | Full Text:PDF
A Low-Power MPEG-4 Codec LSI for Mobile Video Application
Peilin LIU Li JIANG Hiroshi NAKAYAMA Toshiyuki YOSHITAKE Hiroshi KOMAZAKI Yasuhiro WATANABE Hisakatsu ARAKI Kiyonori MORIOKA Shinhaeng LEE Hajime KUBOSAWA Yukio OTOBE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4 ; pp. 652-660
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
MPEG-4 codec LSI, clock-gating, motion-estimation algorithm, error resilience, 
 Summary | Full Text:PDF