Keyword : MIPS processor


Asynchronous Circuit Designs on an FPGA for Targeting a Power/Energy Efficient SoC
Jeong-Gun LEE Myeong-Hoon OH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4 ; pp. 253-263
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
asynchronous circuitFPGA deviceMIPS processorlow power
 Summary | Full Text:PDF

Code Compression with Split Echo Instructions
Iver STUBDAL Arda KARADUMAN Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2009/09/01
Vol. E92-D  No. 9 ; pp. 1650-1656
Type of Manuscript:  PAPER
Category: Fundamentals of Software and Theory of Programs
Keyword: 
code sizeecho instructionscompressionMIPS processor
 Summary | Full Text:PDF

A Semi-Synchronous Circuit Design Method by Clock Tree Modification
Seiichiro ISHIJIMA Tetsuaki UTSUMI Tomohiro OTO Atsushi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12 ; pp. 2596-2602
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Design
Keyword: 
semi-synchronous circuitclock treeMIPS processor
 Summary | Full Text:PDF