Keyword : LUT-based FPGA


Testing for the Programming Circuit of SRAM-Based FPGAs
Hiroyuki MICHINISHI Tokumi YOKOHIRA Takuji OKAMOTO Tomoo INOUE Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/06/25
Vol. E82-D  No. 6 ; pp. 1051-1057
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
fault detectionLUT-based FPGASRAM-based FPGAfunctional faultconfiguration
 Summary | Full Text:PDF(608.4KB)

A Variable Partitioning Algorithm of BDD for FPGA Technology Mapping
Jie-Hong JIANG Jing-Yang JOU Juinn-Dar HUANG Jung-Shian WEI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1813-1819
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
binary decision diagramsequivalent classRoth-Karp decompositionLUT-based FPGA
 Summary | Full Text:PDF(629.2KB)