Keyword : LSI


Impact of Floating Body Type DRAM with the Vertical MOSFET
Yuto NORIFUSA Tetsuo ENDOH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5 ; pp. 705-711
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
floating body type DRAM1T-DRAMmemory architecturevertical MOSFET3D structured deviceLSI
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Sub-10 nm Multi-Nano-Pillar Type Vertical MOSFET
Tetsuo ENDOH Koji SAKUI Yukio YASUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/05/01
Vol. E93-C  No. 5 ; pp. 557-562
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Emerging Devices
Keyword: 
vertical MOSFET3D structured deviceMOSFETLSI
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A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI
Yusuke OHTOMO Hiroshi KOIZUMI Kazuyoshi NISHIMURA Masafumi NOGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4 ; pp. 655-661
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
LSICDRCMOSSOIjitter
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Bit-Serial Single Flux Quantum Microprocessor CORE
Akira FUJIMAKI Masamitsu TANAKA Takahiro YAMADA Yuki YAMANASHI Heejoung PARK Nobuyuki YOSHIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/03/01
Vol. E91-C  No. 3 ; pp. 342-349
Type of Manuscript:  INVITED PAPER (Special Section on Recent Progress in Superconductive Digital Electronics)
Category: 
Keyword: 
superconductormicroprocessorsingle flux quantumbit-serialLSI
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LSI On-Chip Optical Interconnection with Si Nano-Photonics
Junichi FUJIKATA Kenichi NISHI Akiko GOMYO Jun USHIDA Tsutomu ISHI Hiroaki YUKAWA Daisuke OKAMOTO Masafumi NAKADA Takanori SHIMIZU Masao KINOSHITA Koichi NOSE Masayuki MIZUNO Tai TSUCHIZAWA Toshifumi WATANABE Koji YAMADA Seiichi ITABASHI Keishi OHASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/02/01
Vol. E91-C  No. 2 ; pp. 131-137
Type of Manuscript:  INVITED PAPER (Special Section on Silicon Photonics Technologies and Their Applications)
Category: 
Keyword: 
optical interconnectLSISi nano-photonicsSiON waveguideSi nano-photodiodesurface plasmon antennaTIA-less optical clock circuit
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Design of a Neural Network Chip for the Burst ID Model with Ability of Burst Firing
Shinya SUENAGA Yoshihiro HAYAKAWA Koji NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4 ; pp. 715-723
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
burst firingneural networkoptimization problemLSI
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The Front-End LSI with a 5-Tap PRML for 2 Reading and Writing of BD-R/RW/ROM
GoangSeog CHOI JumHan BAE HyunSoo PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4 ; pp. 727-730
Type of Manuscript:  Special Section LETTER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
BDLSIPRMLOPCViterbi detector
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Mixed Signal SoC Era
Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 867-877
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
CMOSLSIsystem LSImixed signal technologyanalog circuitLSI designanalog device
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Cancellation of Multiple Echoes by Multiple Autonomic and Distributed Echo Canceler Units
Akihiko SUGIYAMA Kenji ANZAI Hiroshi SATO Akihiro HIRANO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/11/25
Vol. E81-A  No. 11 ; pp. 2361-2369
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
adaptive filterechomultiple echoesecho canceler sparse-tapalgorithmLSI
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Low Power Management Method for PDS ONU Logic LSIs
Koichi SAITO Kiyoshi MATSUMOTO Kennosuke FUKAMI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/03/25
Vol. E81-B  No. 3 ; pp. 604-608
Type of Manuscript:  PAPER
Category: Communication Device and Circuit
Keyword: 
LSIlogic LSIlow powerPDSONU
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A High-Performance Multicast Switch and Its Feasibility Study
Shigeo URUSHIDANI Shigeki HINO Yusuke OHTOMO Sadayuki YASUDA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Vol. E81-B  No. 2 ; pp. 284-296
Type of Manuscript:  Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: Multicasting in ATM switch
Keyword: 
ATMswitchmulticastreroutingbanyanLSI
 Summary | Full Text:PDF

A New Description of MOS Circuits at Switch-Level with Applications
Massoud PEDRAM Xunwei WU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1892-1901
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
MOSLSIpass-transistor logicswitching theorylow power design
 Summary | Full Text:PDF

A Balanced-Mesh Clock Routing Technique for Performance Improvement
Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8 ; pp. 1489-1495
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSICADlayout designclock skewpartitioningroutingMPEG2
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A Learning Algorithm for a Neural Network LSI with Restricted Integer Weights
Tomohisa KIMURA Takeshi SHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7 ; pp. 983-989
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Neural Networks and Chips
Keyword: 
neural networkslearninganalogLSIaccuracy
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A 3.2 GFLOPS Neural Network Accelerator
Shinji KOMORI Yutaka ARIMA Yoshikazu KONDO Hirono TSUBOTA Ken-ichi TANAKA Kazuo KYUMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7 ; pp. 859-867
Type of Manuscript:  INVITED PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: 
Keyword: 
neural networkparallel processingSIMDLSI
 Summary | Full Text:PDF

Hierarchical Fault Tracing for VLSIs with Bi-directional Busses from CAD Layout Data in the CAD-Linked EB Test System
Katsuyoshi MIURA Koji NAKAMAE Hiromu FUJIOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3 ; pp. 498-502
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
bi-directional buscircuit extraction from CAD layoutelectron beam testingLSI
 Summary | Full Text:PDF

Low Power Design Technology for Digital LSIs
Tadayoshi ENOMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/12/25
Vol. E79-C  No. 12 ; pp. 1639-1649
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Power LSI Technologies)
Category: 
Keyword: 
power dissipationactive power dissipationstand-by power dissipationlow power circuit technologyLSICMOS LSIsGaAs LSIsmlulti-media LSIsvideo codec LSIssignal handling capabilitythroughputclock frequencyvideo signal processorVSPDSP. H.261MPEG2
 Summary | Full Text:PDF

VLSI-Oriented Input and Output Buffered Switch Architecture for High-Speed ATM Backbone Nodes
Yukio KAMATANI Yoshihiro OHBA Yoshimitsu SHIMOJO Koutarou ISE Masahiko MOTOYAMA Toshitada SAITO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/05/25
Vol. E79-B  No. 5 ; pp. 647-657
Type of Manuscript:  Special Section PAPER (Special Issue on High Speed Local Area Network)
Category: 
Keyword: 
ATMswitchnodehigh-speedbackboneflow controlinput bufferoutput buffershared buffermulticastQoSLSI
 Summary | Full Text:PDF

An Analytical Modeling of Three Primary Wiring Capacitance Components for Multi-Layer Interconnect Structure
Susumu KUROSAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A  No. 12 ; pp. 1793-1798
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
capacitancemodelinginterconnectLSILPE
 Summary | Full Text:PDF

Overview of Low-Power ULSI Circuit Techniques
Tadahiro KURODA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/04/25
Vol. E78-C  No. 4 ; pp. 334-344
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits)
Category: 
Keyword: 
LSICMOSlow-powerlow-voltagepower-delay productenergy-delay productpass-transistor logic
 Summary | Full Text:PDF

Synergistic Power/Area Optimization with Transistor Sizing and Wire Length Minimization
Masaaki YAMADA Sachiko KUROSAWA Reiko NOJIMA Naohito KOJIMA Takashi MITSUHASHI Nobuyuki GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/04/25
Vol. E78-C  No. 4 ; pp. 441-446
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Voltage, Low-Power Integrated Circuits)
Category: DA/Architecture
Keyword: 
LSIlayouttransistor sizinglow powerCAD
 Summary | Full Text:PDF

A Global Router for Analog Function Blocks Based on the Branch-and-Bound Algorithm
Tadanao TSUBOTA Masahiro KAWAKITA Takahiro WATANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/03/25
Vol. E78-A  No. 3 ; pp. 345-352
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 7th Karuizawa Workshop on Circuits and Systems)
Category: VLSI Design Technology and CAD
Keyword: 
branch-and-boundlayoutglobal routingchannel-intersection graphanalogLSICAD
 Summary | Full Text:PDF

Development of Improved Low Power MUSE (HDTV) Decoder Chip Set 2.5th Generation MUSE Chip Set
Kiyoshi KOHIYAMA Kota OTSUBO Hidenaga TAKAHASHI Kiyotaka OGAWA Yukio OTOBE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12 ; pp. 1859-1864
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
HDTVMUSELSIpower
 Summary | Full Text:PDF

An Efficient Self-Timed Queue Architecture for ATM Switch LSIs
Harufusa KONDOH Hideaki YAMANAKA Masahiko ISHIWAKI Yoshio MATSUDA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12 ; pp. 1865-1872
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
ATMATM switchLSIself-timed systems
 Summary | Full Text:PDF

Polyacetylene for Soliton Devices
Nobuo SASAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7 ; pp. 1056-1063
Type of Manuscript:  INVITED PAPER (Special Issue on New Architecture LSIs)
Category: 
Keyword: 
polyacetylenesolitonLSIone-dimensional conductormolecular device
 Summary | Full Text:PDF

Research Topics and Results on Analog Circuit Design for LSI
Nobuo FUJII 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/07/25
Vol. E76-A  No. 7 ; pp. 1061-1069
Type of Manuscript:  Special Section PAPER (Special Section on Surveys of Researches in CAS Fields in the Last Two Decades, I)
Category: 
Keyword: 
analog circuitsLSI
 Summary | Full Text:PDF

A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs
Harufusa KONDOH Hiromi NOTANI Hideaki YAMANAKA Keiichi HIGASHITANI Hirotaka SAITO Isamu HAYASHI Yoshio MATSUDA Kazuyoshi OSHIMA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7 ; pp. 1094-1101
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Improved Binary Digital Architectures
Keyword: 
B-ISDNATMswitchLSIBiCMOS
 Summary | Full Text:PDF

Precise Linewidth Measurement Using a Scanning Electron Probe
Fumio MIZUNO Satoru YAMADA Akihiro MIURA Kenji TAKAMOTO Tadashi OHTAKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4 ; pp. 600-606
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Process Technology
Keyword: 
LSImetrology systemscanning electron probemeasurement accuracyreproducibilitylinearityrepeatability
 Summary | Full Text:PDF

High Speed Sub-Half Micron SATURN Transistor Using Epitaxial Base Technology
Hirokazu FUJIMAKI Kenichi SUZUKI Yoshio UMEMURA Koji AKAHANE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4 ; pp. 577-581
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
intergrated electronicsbipolar transistorLSIselective epitaxyself-alignmentSIC
 Summary | Full Text:PDF

Integrated Circuits for Ultra-High-Speed Optical Fiber Transmission Systems
Kohji HOHKAWA Shinji MATSUOKA Kazuo HAGIMOTO Kiyoshi NAKAGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/01/25
Vol. E76-C  No. 1 ; pp. 68-77
Type of Manuscript:  INVITED PAPER (Special Issue on Opto-Electronics and LSI)
Category: LSI Technology for Opto-Electronics
Keyword: 
optical fibertransmission systemLSIGaAsSi
 Summary | Full Text:PDF

An MOS Operational Transconductance Amplifier and an MOS Four-Quadrant Analog Multiplier Using the Quadritail Cell
Katsuji KIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/12/25
Vol. E75-A  No. 12 ; pp. 1774-1776
Type of Manuscript:  Special Section LETTER (Special Section on the 1992 IEICE Fall Conference)
Category: 
Keyword: 
OTAmultipliertransconductancequadritail cellMOSLSI
 Summary | Full Text:PDF

Isolation Characteristics in GaAs ICs on Semi-Insulating Substrate
Kazuyuki INOKUCHI Yuko SEKINO-ITOH Yoshiaki SANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Vol. E75-C  No. 10 ; pp. 1154-1164
Type of Manuscript:  Special Section PAPER (Special Issue on Compound Semiconductor Integrated Circuits)
Category: 
Keyword: 
isolationleaksidegateM-i-nLSI
 Summary | Full Text:PDF