Keyword : LSI testing

Formulation of a Test Pattern Measure That Counts Distinguished Fault-Pairs for Circuit Fault Diagnosis
Tsutomu INAMOTO Yoshinobu HIGAMI 
Publication:   
Publication Date: 2020/12/01
Vol. E103-A  No. 12 ; pp. 1456-1463
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
LSI testing, circuit fault diagnosis, set cover problem, greedy heuristic, fault-pair, 
 Summary | Full Text:PDF
A Practical Analog BIST Cooperated with an LSI Tester
Takanori KOMURO Naoto HAYASAKA Haruo KOBAYASHI Hiroshi SAKAYORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/02/01
Vol. E89-A  No. 2 ; pp. 465-468
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
LSI testing, analog circuit, BIST, equivalent-time sampling, sampler, 
 Summary | Full Text:PDF
Generation of Test Sequences with Low Power Dissipation for Sequential Circuits
Yoshinobu HIGAMI Shin-ya KOBAYASHI Yuzo TAKAMATSU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/03/01
Vol. E87-D  No. 3 ; pp. 530-536
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSI)
Category: Test Generation and Compaction
Keyword: 
LSI testing, sequential circuit, test generation, low power dissipation, stuck-at fault, 
 Summary | Full Text:PDF