Keyword : LSI CAD


Power and Timing Optimization for ECL LSIs in Post-Layout Design
Akira ONOZAWA Hitoshi KITAZAWA Kenji KAWAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/06/25
Vol. E79-A  No. 6 ; pp. 892-899
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSI CADECLpowerdelaynon-linear optimization
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