Keyword : LRU


A SOI Cache-Tag Memory with Dual-Rail Wordline Scheme
Nobutaro SHIBATA Takako ISHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/02/01
Vol. E99-C  No. 2 ; pp. 316-330
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
4-way set-associativecache-tagCMOSdirected graphdual-rail wordlineFD-SOII/O-separated memory cellLRUNRZ-type write-enable signalSIMOXSRAM
 Summary | Full Text:PDF

VLRU: Buffer Management in Client-Server Systems
Sung-Jin LEE Chin-Wan CHUNG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/06/25
Vol. E83-D  No. 6 ; pp. 1245-1254
Type of Manuscript:  PAPER
Category: Databases
Keyword: 
buffer replacement algorithmLRUclient-server database
 Summary | Full Text:PDF