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Compact Architecture for ASIC and FPGA Implementation of the KASUMI Block Cipher
Dai YAMAMOTO Kouichi ITOH Jun YAJIMA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A
No. 12 ;
pp. 2628-2638
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword:
block cipher, KASUMI, hardware, ASIC, FPGA, compact implementation, | | | Summary | Full Text:PDF(945.4KB) | |
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