IDDQ Outlier Screening through Two-Phase Approach: Clustering-Based Filtering and Estimation-Based Current-Threshold Determination Michihiro SHINTANITakashi SATO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/02/01 Vol. E96-DNo. 2 ;
pp. 303-313 Type of Manuscript: PAPER Category: Dependable Computing Keyword: IDDQ testing, statistical leakage current analysis, Bayes' theorem,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/06/01 Vol. E89-CNo. 6 ;
pp. 868-870 Type of Manuscript: LETTER Category: Integrated Electronics Keyword: IDDQ testing, current testing, BICS, reliability,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/03/01 Vol. E87-DNo. 3 ;
pp. 537-543 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Test Generation and Compaction Keyword: IDDQ testing, bridging faults, switching current, supply current test, CMOS circuits,
An Analysis of the Relationship between IDDQ Testability and D-Type Flip-Flop Structure Yukiya MIURAHiroshi YAMAZAKI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/10/25 Vol. E81-DNo. 10 ;
pp. 1072-1078 Type of Manuscript: PAPER Category: Fault Tolerant Computing Keyword: IDDQ testing, bridging faults, flip-flops, fault analysis,
An Iterative Improvement Method for Generating Compact Tests for IDDQ Testing of Bridging Faults Tsuyoshi SHINOGITerumine HAYASHI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/07/25 Vol. E81-DNo. 7 ;
pp. 682-688 Type of Manuscript: Special Section PAPER (Special Issue on Test and Diagnosis of VLSI) Category: IDDQ Testing Keyword: compaction, IDDQ testing, iterative improvement method, bridging fault, ATPG,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/07/25 Vol. E81-DNo. 7 ;
pp. 689-696 Type of Manuscript: Special Section PAPER (Special Issue on Test and Diagnosis of VLSI) Category: IDDQ Testing Keyword: sequential circuit, test generation, IDDQ testing, bridging fault,