Keyword : Floyd-Warshall algorithm


Blocked United Algorithm for the All-Pairs Shortest Paths Problem on Hybrid CPU-GPU Systems
Kazuya MATSUMOTO Naohito NAKASATO Stanislav G. SEDUKHIN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12 ; pp. 2759-2768
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Parallel and Distributed Computing
Keyword: 
all-pairs shortest paths problempath constructionFloyd-Warshall algorithmblocked algorithmhybrid CPU-GPU systems
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A Solution of the All-Pairs Shortest Paths Problem on the Cell Broadband Engine Processor
Kazuya MATSUMOTO Stanislav G. SEDUKHIN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2009/06/01
Vol. E92-D  No. 6 ; pp. 1225-1231
Type of Manuscript:  PAPER
Category: Computation and Computational Models
Keyword: 
all-pairs shortest paths problemFloyd-Warshall algorithmCell/B.E. processorperformance evaluation
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Checking of Timing Constraint Violation Based on Graph in Reactive Systems
Hiromi KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4 ; pp. 909-913
Type of Manuscript:  LETTER
Category: Graphs and Networks
Keyword: 
timing constraint violationconstraint graphReal Time LogicFloyd-Warshall algorithm
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