| Keyword : FD-SOI
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A SOI Cache-Tag Memory with Dual-Rail Wordline Scheme Nobutaro SHIBATA Takako ISHIHARA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2016/02/01
Vol. E99-C
No. 2 ;
pp. 316-330
Type of Manuscript:
PAPER
Category: Integrated Electronics Keyword: 4-way set-associative, cache-tag, CMOS, directed graph, dual-rail wordline, FD-SOI, I/O-separated memory cell, LRU, NRZ-type write-enable signal, SIMOX, SRAM, | | Summary | Full Text:PDF | |
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Low-Voltage Embedded RAMs in Nanometer Era Takayuki KAWAHARA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C
No. 4 ;
pp. 735-742
Type of Manuscript:
INVITED PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Keyword: low-voltage, SRAM, DRAM, FD-SOI, twin-cell, embedded RAM, | | Summary | Full Text:PDF | |
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