| Keyword : DVFS
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A Low Power Multimedia Processor Implementing Dynamic Voltage and Frequency Scaling Technique and Fast Motion Estimation Algorithm Called “Adaptively Assigned Breaking-Off Condition (A2BC)” Tadayoshi ENOMOTO Nobuaki KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C
No. 4 ;
pp. 424-432
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: Keyword: multimedia, H.264/AVC, motion estimation, DVFS, power dissipation, DC/DC level converter, | | Summary | Full Text:PDF | |
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Minimum-Energy Semi-Static Scheduling of a Periodic Real-Time Task on DVFS-Enabled Multi-Core Processors Wan Yeon LEE Hyogon KIM Heejo LEE | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/12/01
Vol. E94-D
No. 12 ;
pp. 2389-2392
Type of Manuscript:
Special Section LETTER (Special Section on Parallel and Distributed Computing and Networking)
Category: Keyword: scheduling, real-time task, multi-core, energy, DVFS, | | Summary | Full Text:PDF | |
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