Keyword : DRAM-based neuro-chip

The Advantages of a DRAM-Based Digital Architecture for Low-Power, Large-Scale Neuro-Chips
Takao WATANABE Masakazu AOKI Katsutaka KIMURA Takeshi SAKATA Kiyoo ITOH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7 ; pp. 1206-1214
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Neural Networks and Chips
DRAM-based neuro-chip106-synapse neural network1.5-V digital chip0.5-µm CMOS design rule
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