Keyword : DDC

Experimental Study of Jitter Effect on Digital Downconversion Receiver with Undersampling Scheme
Minseok KIM Aiko KIYONO Koichi ICHIGE Hiroyuki ARAI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7 ; pp. 1430-1436
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Communications and Wireless Systems
clock jitterundersamplingdownconversionDDCEVM
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