Keyword : CMOS design

64-Bit High-Performance Power-Aware Conditional Carry Adder Design
Kuo-Hsing CHENG Shun-Wen CHENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C  No. 6 ; pp. 1322-1331
Type of Manuscript:  PAPER
Category: Integrated Electronics
conditional sum adderconditional carry adderpower-awarehybrid dual-threshold voltageCMOS design
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A New Hierarchical RSM for TCAD-Based Device Design in 0.4µm CMOS Development
Hisako SATO Katsumi TSUNENO Kimiko AOYAMA Takahide NAKAMURA Hisaaki KUNITOMO Hiroo MASUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/02/25
Vol. E79-C  No. 2 ; pp. 226-233
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: Statistical Analysis
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