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Keyword : CMOS compatible

A Rewritable CMOS-FUSE for System-on-Chip with a Differential Cell Architecture in a 0.13 µm CMOS Logic Process Hiroyuki YAMAUCHI Yasuhiro AGATA Masanori SHIRAHAMA Toshiaki KAWASAKI Ryuji NISHIHARA Kazunari TAKAHASHI Hirohito KIKUKAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/10/01 Vol. E87-C No. 10 ; pp. 1664-1672 Type of Manuscript: Special Section PAPER (Special Section on New Era of Nonvolatile Memories) Category: CMOS Fuse Keyword: nonvolatile memory, data retention, fuse, CMOS compatible,
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