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| Keyword : CAD
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Substrate Coupling Simulation Suitable for Conventional CAD Tools
Tomohisa KIMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A
No. 2 ;
pp. 419-423
Type of Manuscript:
Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category:
Keyword:
substrate coupling, simulation, modeling, CAD, test chip, | | | Summary | Full Text:PDF | |
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An Efficient Method for The Derivation of Signal Flow Direction in Digital CMOS VLSI
Ahmed Riadh BABA-ALI Ahcene FARAH | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A
No. 10 ;
pp. 1902-1907
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
VLSI, CAD, MOS, switch-level, signal flow, | | | Summary | Full Text:PDF | |
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A New Rip-Up and Reroute Algorithm for Very Large Scale Gate Arrays
Hiroshi SHIROTA Satoshi SHIBATANI Masayuki TERAI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A
No. 3 ;
pp. 506-513
Type of Manuscript:
Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
Category:
Keyword:
multilayer routing, layout, CAD, VLSI, | | | Summary | Full Text:PDF | |
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Unified Process Flow Management System for ULSI Semiconductor Manufacturing
Etsuo FUKUDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1996/03/25
Vol. E79-C
No. 3 ;
pp. 282-289
Type of Manuscript:
Special Section PAPER (Special Issue on Scientific ULSI Manufacturing Technology)
Category: CIM/CAM
Keyword:
CIM, CAD, PDL, process specification, simulation, | | | Summary | Full Text:PDF | |
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Validation of UDL/I Test Suites and UDL/I Simulation/Synthesis Environment
Hiroyuki KANBARA Satoshi YOKOTA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A
No. 12 ;
pp. 1749-1754
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
hardware description language, test suites, validation, CAD, | | | Summary | Full Text:PDF | |
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A Hybrid Hierarchical Global Router for Multi-Layer VLSI's
Masayuki HAYASHI Shuji TSUKIYAMA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/03/25
Vol. E78-A
No. 3 ;
pp. 337-344
Type of Manuscript:
Special Section PAPER (Special Section of Selected Papers from the 7th Karuizawa Workshop on Circuits and Systems)
Category: VLSI Design Technology and CAD
Keyword:
hybrid hierarchical router, global routing, multi-layer routing, CAD, VLSI, | | | Summary | Full Text:PDF | |
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Wire Length Expressions for Analytical Placement Approach
Shoichiro YAMADA Masahiro KASAI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/04/25
Vol. E77-A
No. 4 ;
pp. 716-718
Type of Manuscript:
LETTER
Category: Computer Aided Design (CAD)
Keyword:
placement, CAD, VLSI design, | | | Summary | Full Text:PDF | |
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File Retrieval Engineering on Distributed EnviRonment and Interactive Communication System