Keyword : Boolean matching


Accelerating Boolean Matching Using Bloom Filter
Chun ZHANG Yu HU Lingli WANG Lei HE Jiarong TONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/10/01
Vol. E93-A  No. 10 ; pp. 1775-1781
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
FPGABoolean matchingBloom filterSATre-synthesis
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Efficient Computation of Canonical Form under Variable Permutation and Negation for Boolean Matching in Large Libraries
Debatosh DEBNATH Tsutomu SASAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3443-3450
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
logic synthesisBoolean matchingcell-library bindingtechnology mappingcanonical form
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Fast Boolean Matching under Permutation by Efficient Computation of Canonical Form
Debatosh DEBNATH Tsutomu SASAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3134-3140
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
Boolean matchingtechnology mappingvariable permutationP-equivalence
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The Controlling Value Boolean Matching
Ricardo FERREIRA Anne-Marie TRULLEMANS Qinhai ZHANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1749-1755
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
Boolean matchingobservabilitytechnology mappingsignatures
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A New Algorithm for Boolean Matching Utilizing Structural Information
Yusuke MATSUNAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/03/25
Vol. E78-D  No. 3 ; pp. 219-223
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Synthesis
Keyword: 
logic synthesistechnology mappingBoolean matchingbinary decision diagrams
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