Keyword : ATE

An On-The-Fly Jitter Suppression Technique for Plain-CMOS-Logic-Based Timing Verniers: Dynamic Power Compensation with the Extensions of Digitally Variable Delay Lines
Nobutaro SHIBATA Mitsuo NAKAMURA 
Publication:   
Publication Date: 2018/08/01
Vol. E101-A  No. 8 ; pp. 1185-1196
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
ATE, delay-locked loop, digital-to-time converter, linearity error, on the fly, plain CMOS logic, timing jitter, timing vernier, 
 Summary | Full Text:PDF
A Small Size 100MHz to 13.4GHz Fractional-N RF Synthesizer for RF ATE Based on 13-band VCOs and 48-bit ΔΣ Modulator
Masayuki KIMISHIMA Hidenori SAKAI Haruki NAGAMI Goh UTAMARU Hideki SHIRASU Yoshinori KOGAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/10/01
Vol. E96-C  No. 10 ; pp. 1227-1235
Type of Manuscript:  Special Section PAPER (Special Section on Emerging Technologies and Applications for Microwave and Millimeter-Wave Systems)
Category: 
Keyword: 
RF test, ATE, VCO, SIP, ΔΣ modulator, IIR filter, 
 Summary | Full Text:PDF
Introduction to Latest RF ATE with Low Test Cost Solutions
Masayuki KIMISHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/07/01
Vol. E95-C  No. 7 ; pp. 1147-1153
Type of Manuscript:  INVITED PAPER (Special Section on Recent Trends of Microwave Systems and Their Fundamental Technologies)
Category: 
Keyword: 
ATE, SoC tester, SIP, calibration, LTCC, MMIC, 
 Summary | Full Text:PDF
An Architecture of Embedded Decompressor with Reconfigurability for Test Compression
Hideyuki ICHIHARA Tomoyuki SAIKI Tomoo INOUE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3 ; pp. 713-719
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: Test Compression
Keyword: 
test compression, ATE, reconfigurability, variable-length coding, test application, 
 Summary | Full Text:PDF
A Variable-Length Coding Adjustable for Compressed Test Application
Hideyuki ICHIHARA Toshihiro OHARA Michihiro SHINTANI Tomoo INOUE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/08/01
Vol. E90-D  No. 8 ; pp. 1235-1242
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
test compression, variable-length coding, test application time, ATE, Huffman code, and test environment, 
 Summary | Full Text:PDF
Huffman-Based Test Response Coding
Hideyuki ICHIHARA Michihiro SHINTANI Tomoo INOUE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/01/01
Vol. E88-D  No. 1 ; pp. 158-161
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
Huffman code, test compression, test response, test application time, ATE, 
 Summary | Full Text:PDF
A Hybrid Dictionary Test Data Compression for Multiscan-Based Designs
Youhua SHI Shinji KIMURA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3193-3199
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword: 
test data compression, test slice, multiple scan chain, ATE, 
 Summary | Full Text:PDF