Keyword : ASSP


Novel VLIW Code Compaction Method for a 3D Geometry Processor
Hiroaki SUZUKI Hiroyuki KAWAI Hiroshi MAKINO Yoshio MATSUDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2885-2893
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
VLIWcode compactionASSP3D geometry processorcomputer graphics
 Summary | Full Text:PDF

A Design of Static Operatable Low-Power 16-bit Microprocessor
Hiroaki KANEKO Takashi MIYAZAKI Hideki SUGIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Vol. E75-C  No. 10 ; pp. 1188-1195
Type of Manuscript:  Special Section PAPER (Special Issue on Microprocessors)
Category: Low-Voltage Operation
Keyword: 
ASSPCMOS deviceCPU coremicroprocessorpower consumptionstatic operation
 Summary | Full Text:PDF