Keyword : C-V

Process Characterization and Optimization for a Novel Oxide-Free Insulated Gate Structure for InP MISFETs Having Silicon Interface Control Layer
Hiroshi TAKAHASHI Masatsugu YAMADA Yong-Gui XIE Seiya KASAI Hideki HASEGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/10/01
Vol. E84-C  No. 10 ; pp. 1344-1349
Type of Manuscript:  Special Section PAPER (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000 (Topical Workshop on Heterostructure Microelectronics 2000))
Category: Hetero-FETs & Their Integrated Circuits
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