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IEICE TRANSACTIONS on Information and Systems
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0.70 1.4
Volume E88-D No.7  (Publication Date:2005/07/01)
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Special Section on Recent Advances in Circuits and Systems--Part 1

pp.1321-1322  FOREWORD
FOREWORD
Takao HINAMOTO  Toshimasa WATANABE  
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pp.1323-1330  PAPER-Digital Signal Processing
Per-Tone Equalization for Single Carrier Block Transmission with Insufficient Cyclic Prefix
Kazunori HAYASHI  Hideaki SAKAI  
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pp.1331-1339  PAPER-Digital Signal Processing
A New Multistage Comb-Modified Rotated Sinc (RS) Decimator with Sharpened Magnitude Response
Gordana Jovanovic DOLECEK  Sanjit K. MITRA  
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pp.1340-1349  PAPER-Programmable Logic, VLSI, CAD and Layout
A SIMD Instruction Set and Functional Unit Synthesis Algorithm with SIMD Operation Decomposition
Nozomu TOGAWA  Koichi TACHIKAKE  Yuichiro MIYAOKA  Masao YANAGISAWA  Tatsuo OHTSUKI  
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pp.1350-1359  PAPER-Programmable Logic, VLSI, CAD and Layout
Hardware n Choose k Counters with Applications to the Partial Exhaustive Search
Koji NAKANO  Youhei YAMAGISHI  
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pp.1360-1368  PAPER-Programmable Logic, VLSI, CAD and Layout
Timing-Constrained Flexibility-Driven Routing Tree Construction
Jin-Tai YAN  Yen-Hsiang CHEN  Chia-Fang LEE  
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pp.1369-1380  PAPER-Programmable Logic, VLSI, CAD and Layout
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications
Konstantinos SIOZIOS  George KOUTROUMPEZIS  Konstantinos TATAS  Nikolaos VASSILIADIS  Vasilios KALENTERIDIS  Haroula POURNARA  Ilias PAPPAS  Dimitrios SOUDRIS  Antonios THANAILAKIS  Spiridon NIKOLAIDIS  Stilianos SISKOS  
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pp.1381-1388  PAPER-Programmable Logic, VLSI, CAD and Layout
On-Line Pruning of ZBDD for Path Delay Fault Coverage Calculation
Fatih KOCAN  Mehmet H. GUNES  Atakan KURT  
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pp.1389-1396  PAPER-Programmable Logic, VLSI, CAD and Layout
Minimizing the Number of Empty Rooms on Floorplan by Dissection Line Merge
Chikaaki KODAMA  Kunihiro FUJIYOSHI  
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pp.1397-1400  LETTER-Programmable Logic, VLSI, CAD and Layout
Boundary Scan Test Scheme for IP Core Identification via Watermarking
Yu-Cheng FAN  Hen-Wai TSAO  
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pp.1401-1408  PAPER-General and Nonlinear Circuits and Systems
A Homotopy Method Using a Nonlinear Auxiliary Function for Solving Transistor Circuits
Yasuaki INOUE  Yu IMAI  Kiyotaka YAMAMURA  
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pp.1409-1416  PAPER-General and Nonlinear Circuits and Systems
Analysis of Nonlinear Input Impedance Matching in Active Frequency Multipliers
Jessi E. JOHNSON  Andrew SILVA  George R. BRANNER  
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pp.1417-1429  PAPER-Communications and Wireless Systems
On the Construction of High-Rate Quasi-Orthogonal STBC for MIMO QR Demodulation
Minh-Tuan LE  Van-Su PHAM  Linh MAI  Giwan YOON  
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pp.1430-1436  PAPER-Communications and Wireless Systems
Experimental Study of Jitter Effect on Digital Downconversion Receiver with Undersampling Scheme
Minseok KIM  Aiko KIYONO  Koichi ICHIGE  Hiroyuki ARAI  
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pp.1437-1444  PAPER-Communications and Wireless Systems
Differential Value Encoding for Delay Insensitive Handshake Protocol
Eun-Gu JUNG  Jeong-Gun LEE  Kyoung-Sun JHANG  Dong-Soo HAR  
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pp.1445-1452  PAPER-Communications and Wireless Systems
The Theory and Design of a Class of Recombination Nonuniform Filter Banks with Linear Phase Filters
Xue-Mei XIE  Shing-Chow CHAN  
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pp.1453-1456  LETTER-Communications and Wireless Systems
Estimation of Target Position by the Combination of MUSIC and Adaptive Beamforming in Stepped-FM Array Radar
Toshihiko FUKUE  Atsushi FUJITA  Nozomu HAMADA  
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pp.1457-1459  LETTER-Communications and Wireless Systems
Diagonal Block Orthogonal Algebraic Space-Time Block Codes
Chen LIU  Zhenyang WU  Hua-An ZHAO  
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pp.1460-1463  LETTER-Communications and Wireless Systems
Low Latency Four-Flop Synchronizer with the Handshake Interface
Suk-Jin KIM  Jeong-Gun LEE  Kiseon KIM  
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pp.1464-1471  PAPER-Digital Circuits and Computer Arithmetic
A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition
Tso-Bing JUANG  Shen-Fu HSIAO  Ming-Yu TSAI  Jenq-Shiun JAN  
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pp.1472-1478  PAPER-Digital Circuits and Computer Arithmetic
Block Time-Recursive Real-Valued Discrete Gabor Transform Implemented by Unified Parallel Lattice Structures
Liang TAO  Hon Keung KWAN  
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pp.1479-1485  PAPER-Digital Circuits and Computer Arithmetic
A Lower-Power Register File Based on Complementary Pass-Transistor Adiabatic Logic
Jianping HU  Tiefeng XU  Hong LI  
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pp.1486-1491  PAPER-Digital Circuits and Computer Arithmetic
Architecture of a Stereo Matching VLSI Processor Based on Hierarchically Parallel Memory Access
Masanori HARIYAMA  Haruka SASAKI  Michitaka KAMEYAMA  
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pp.1492-1500  PAPER-Digital Circuits and Computer Arithmetic
Output Phase Optimization for AND-OR-EXOR PLAs with Decoders and Its Application to Design of Adders
Debatosh DEBNATH  Tsutomu SASAO  
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pp.1501-1505  PAPER-Digital Circuits and Computer Arithmetic
Noise Metrics in Flip-Flop Designs
Mohammed A. ELGAMEL  Md Ibrahim FAISAL  Magdy A. BAYOUMI  
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pp.1506-1508  LETTER-Digital Circuits and Computer Arithmetic
Design of a Mutated Adder and Its Optimization Using ILP Formulation
Jeong-Gun LEE  Jeong-A LEE  Suk-Jin KIM  Kiseon KIM  
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pp.1509-1510  LETTER-Digital Circuits and Computer Arithmetic
A 0.18 µm CMOS 3rd-Order Digitally Programmable Gm-C Filter for VHF Applications
Aranzazu OTIN  Santiago CELMA  Concepcion ALDEA  
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pp.1511-1518  PAPER-Adaptive Signal Processing
Noise Reduction for NMR FID Signals via Oversampled Real-Valued Discrete Gabor Transform
Liang TAO  Hon Keung KWAN  
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pp.1519-1525  PAPER-Adaptive Signal Processing
A Digital Filter for Stochastic Systems with Unknown Structure and Its Application to Psychological Evaluation of Sound Environment
Akira IKUTA  Hisako MASUIKE  Mitsuo OHTA  
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pp.1526-1537  PAPER-Adaptive Signal Processing
Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving
Kazunori SHIMIZU  Nozomu TOGAWA  Takeshi IKENAGA  Satoshi GOTO  
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pp.1538-1545  PAPER-Adaptive Signal Processing
Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems
Luca FANUCCI  Sergio SAPONARA  Massimiliano MELANI  Pierangelo TERRENI  
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pp.1546-1552  PAPER-Image Processing and Multimedia Systems
An Image Processing Approach for the Measurement of Pedestrian Crossing Length Using Vector Geometry
Mohammad Shorif UDDIN  Tadayoshi SHIOYAMA  
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pp.1553-1560  PAPER-Image Processing and Multimedia Systems
Semi-Automatic Video Object Segmentation Using LVQ with Color and Spatial Features
Hariadi MOCHAMAD  Hui Chien LOY  Takafumi AOKI  
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pp.1561-1568  PAPER-Image Processing and Multimedia Systems
Content-Based Motion Estimation with Extended Temporal-Spatial Analysis
Shen LI  Yong JIANG  Takeshi IKENAGA  Satoshi GOTO  
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pp.1569-1577  PAPER-Image Processing and Multimedia Systems
An Efficient Matrix-Based 2-D DCT Splitter and Merger for SIMD Instructions
Yuh-Jue CHUANG  Ja-Ling WU  
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pp.1578-1586  PAPER-Image Processing and Multimedia Systems
A Visual Attention Based Region-of-Interest Determination Framework for Video Sequences
Wen-Huang CHENG  Wei-Ta CHU  Ja-Ling WU  
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pp.1587-1597  PAPER-Image Processing and Multimedia Systems
Consideration of Contents Utilization Time in Multi-Quality Video Content Delivery Methods with Scalable Transcoding
Mei KODAMA  Shunya SUZUKI  
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pp.1598-1606  PAPER-Image Processing and Multimedia Systems
A New Unified Lossless/Lossy Image Compression Based on a New Integer DCT
Somchart CHOKCHAITAM  Masahiro IWAHASHI  Somchai JITAPUNKUL  
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pp.1607-1609  LETTER-Image Processing and Multimedia Systems
Test Data Compression Using a Hybrid Run-Length Code Method
Yongmin HUR  
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pp.1610-1617  PAPER-Biomedical Circuits and Systems
A 900 mV 66 µW Sigma-Delta Modulator Dedicated to Implantable Sensors
Zhijun LU  Yamu HU  Mohamad SAWAN  
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pp.1618-1622  LETTER-Biomedical Circuits and Systems
Alaryngeal Speech Enhancement Using Pattern Recognition Techniques
Gualberto AGUILAR  Mariko NAKANO-MIYATAKE  Hector PEREZ-MEANA  
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pp.1623-1629  PAPER-Parallel and/or Distributed Processing Systems
A Highly Parallel Architecture for Deblocking Filter in H.264/AVC
Lingfeng LI  Satoshi GOTO  Takeshi IKENAGA  
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pp.1630-1637  PAPER-Neural Networks and Fuzzy Systems
A Novel Approach for Decreasing CVT Transients in Distance Protection Using Artificial Neural Network
Hassan KHORASHADI-ZADEH  Mohammad Reza AGHAEBRAHIMI  
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Regular Section

pp.1638-1645  PAPER-Networks
Policy and Scope Management for Multicast Channel Announcement
Hitoshi ASAEDA  Vincent ROCA  
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pp.1646-1661  PAPER-Dependable Computing
Partial Order Reduction for Detecting Safety and Timing Failures of Timed Circuits
Denduang PRADUBSUWUN  Tomohiro YONEDA  Chris MYERS  
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pp.1662-1670  PAPER-Dependable Computing
X-Tolerant Test Data Compression for SOC with Enhanced Diagnosis Capability
Gang ZENG  Hideo ITO  
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pp.1671-1677  PAPER-Dependable Computing
On Statistical Estimation of Fault Efficiency for Path Delay Faults Based on Untestable Path Analysis
Masayasu FUKUNAGA  Seiji KAJIHARA  Sadami TAKEOKA  
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pp.1678-1684  PAPER-Dependable Computing
Internally-Disjoint Paths Problem in Bi-Rotator Graphs
Keiichi KANEKO  
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pp.1685-1696  PAPER-Application Information Security
Policy Controlled System and Its Model Checking
Shigeta KUNINOBU  Yoshiaki TAKATA  Naoya NITTA  Hiroyuki SEKI  
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pp.1697-1699  PAPER-Application Information Security
An Improved Nominative Proxy Signature for Mobile Communication
Jianhong ZHANG  Qianhong WU  
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pp.1700-1706  PAPER-Educational Technology
A Statistical Model Based on the Three Head Words for Detecting Article Errors
Ryo NAGATA  Tatsuya IGUCHI  Fumito MASUI  Atsuo KAWAI  Naoki ISU  
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pp.1707-1715  PAPER-Image Processing and Video Processing
Efficient Motion Estimation Using a Modified Early Termination Algorithm in H.264
Sung-Eun KIM  Jong-Ki HAN  
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pp.1716-1723  PAPER-Image Recognition, Computer Vision
A Discriminant Analysis Based Recursive Automatic Thresholding Approach for Image Segmentation
Bing-Fei WU  Yen-Lin CHEN  Chung-Cheng CHIU  
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pp.1724-1736  PAPER-Natural Language Processing
Two-Phase S-Clause Segmentation
Mi-Young KIM  Jong-Hyeok LEE  
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pp.1737-1748  PAPER-Natural Language Processing
Machine Learning Based English-to-Korean Transliteration Using Grapheme and Phoneme Information
Jong-Hoon OH  Key-Sun CHOI  
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pp.1749-1753  LETTER-VLSI Systems
Methodology of High-Level Transaction Level Modeling Using 802.11 PHY Example
Jin LEE  Sin-Chong PARK  
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pp.1754-1758  LETTER-Computer Systems
The Impact of Branch Direction History Combined with Global Branch History in Branch Prediction
Jong Wook KWAK  Ju-Hwan KIM  Chu Shik JHON  
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pp.1759-1762  LETTER-Computer Systems
Memory Testing Tool for Linux Cluster Systems
Kwangho CHA  Jee-hyun SUH  
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pp.1763-1766  LETTER-Rehabilitation Engineering and Assistive Technology
Computer Simulation Test of Fuzzy Controller for the Cycle-to-Cycle Control of Knee Joint Movements of Swing Phase of FES Gait
Achmad ARIFIN  Takashi WATANABE  Nozomu HOSHIMIYA  
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pp.1767-1770  LETTER-Speech and Hearing
Improved Jacobian Adaptation for Robust Speaker Verification
Jan ANGUITA  Javier HERNANDO  Alberto ABAD  
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