IEICE Trans

Online ISSN : 1745-1353

IEICE TRANSACTIONS on Electronics

Volume E94-C No.4 (Publication Date:2011/04/01)

Special Section on Circuits and Design Techniques for Advanced Large Scale Integration

pp.385-385 FOREWORD Open Access Paper FOREWORD Kunio UCHIYAMA
	Summary \| FreeFull Text:PDF(93.6KB)

pp.386-393 INVITED PAPER Open Access Paper Prospective Silicon Applications and Technologies in 2025 Koji KAI Minoru FUJISHIMA
	Summary \| FreeFull Text:PDF(1.2MB)

pp.394-400 INVITED PAPER Open Access Paper Low Power Platform for Embedded Processor LSIs Toru SHIMIZU Kazutami ARIMOTO Osamu NISHII Sugako OTANI Hiroyuki KONDO
	Summary \| FreeFull Text:PDF(1.2MB)

pp.401-410 PAPER Multiple Region-of-Interest Based H.264 Encoder with a Detection Architecture in Macroblock Level Pipelining Tianruo ZHANG Chen LIU Minghui WANG Satoshi GOTO
	Summary \| Full Text:PDF (3.3MB) >> Buy this Article

pp.411-418 PAPER Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC Yibo FAN Xiaoyang ZENG Satoshi GOTO
	Summary \| Full Text:PDF (1.6MB) >> Buy this Article

pp.419-427 PAPER A 530 Mpixels/s Intra Prediction Architecture for Ultra High Definition H.264/AVC Encoder Gang HE Dajiang ZHOU Jinjia ZHOU Tianruo ZHANG Satoshi GOTO
	Summary \| Full Text:PDF (2.1MB) >> Buy this Article

pp.428-438 PAPER Highly Parallel and Fully Reused H.264/AVC High Profile Intra Predictor Generation Engine for Super Hi-Vision 4k4k@60 fps Yiqing HUANG Xiaocong JIN Jin ZHOU Jia SU Takeshi IKENAGA
	Summary \| Full Text:PDF (1.6MB) >> Buy this Article

pp.439-447 PAPER Cache Based Motion Compensation Architecture for Quad-HD H.264/AVC Video Decoder Jinjia ZHOU Dajiang ZHOU Gang HE Satoshi GOTO
	Summary \| Full Text:PDF (1.1MB) >> Buy this Article

pp.448-457 PAPER A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition Kosuke MIZUNO Hiroki NOGUCHI Guangji HE Yosuke TERACHI Tetsuya KAMINO Tsuyoshi FUJINAGA Shintaro IZUMI Yasuo ARIKI Hiroshi KAWAGUCHI Masahiko YOSHIMOTO
	Summary \| Full Text:PDF (3.2MB) >> Buy this Article

pp.458-467 PAPER VLSI Architecture of GMM Processing and Viterbi Decoder for 60,000-Word Real-Time Continuous Speech Recognition Hiroki NOGUCHI Kazuo MIURA Tsuyoshi FUJINAGA Takanobu SUGAHARA Hiroshi KAWAGUCHI Masahiko YOSHIMOTO
	Summary \| Full Text:PDF (1.8MB) >> Buy this Article

pp.468-476 PAPER A Novel Cache Replacement Policy via Dynamic Adaptive Insertion and Re-Reference Prediction Xi ZHANG Chongmin LI Zhenyu LIU Haixia WANG Dongsheng WANG Takeshi IKENAGA
	Summary \| Full Text:PDF (1.2MB) >> Buy this Article

pp.477-486 PAPER A Dynamic Continuous Signature Monitoring Technique for Reliable Microprocessors Makoto SUGIHARA
	Summary \| Full Text:PDF (485.3KB) >> Buy this Article

pp.487-494 PAPER All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Utilizing Buffer Ring with Pulse Counter Tetsuya IIZUKA Jaehyun JEONG Toru NAKURA Makoto IKEDA Kunihiro ASADA
	Summary \| Full Text:PDF (1.1MB) >> Buy this Article

pp.495-503 PAPER A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits Yoji BANDO Satoshi TAKAYA Toru OHKAWA Toshiharu TAKARAMOTO Toshio YAMADA Masaaki SOUDA Shigetaka KUMASHIRO Tohru MOGAMI Makoto NAGATA
	Summary \| Full Text:PDF (2.4MB) >> Buy this Article

pp.504-510 PAPER Stochastic Non-homogeneous Arnoldi Method for Analysis of On-Chip Power Grid Networks under Process Variations Zhihua GUI Fan YANG Xuan ZENG
	Summary \| Full Text:PDF (555.8KB) >> Buy this Article

pp.511-519 PAPER On-Chip Resonant Supply Noise Canceller Utilizing Parasitic Capacitance of Sleep Blocks for Power Mode Switch Jinmyoung KIM Toru NAKURA Hidehiro TAKATA Koichiro ISHIBASHI Makoto IKEDA Kunihiro ASADA
	Summary \| Full Text:PDF (1.7MB) >> Buy this Article

pp.520-529 PAPER Short Term Cell-Flipping Technique for Mitigating SNM Degradation Due to NBTI Yuji KUNITAKE Toshinori SATO Hiroto YASUURA
	Summary \| Full Text:PDF (1.2MB) >> Buy this Article

pp.530-538 PAPER A Large “Read” and “Write” Margins, Low Leakage Power, Six-Transistor 90-nm CMOS SRAM Tadayoshi ENOMOTO Nobuaki KOBAYASHI
	Summary \| Full Text:PDF (1.4MB) >> Buy this Article

pp.539-547 PAPER Improvement of Read Disturb, Program Disturb and Data Retention by Memory Cell V_TH Optimization of Ferroelectric (Fe)-NAND Flash Memories for Highly Reliable and Low Power Enterprise Solid-State Drives (SSDs) Teruyoshi HATANAKA Mitsue TAKAHASHI Shigeki SAKAI Ken TAKEUCHI
	Summary \| Full Text:PDF (1.4MB) >> Buy this Article

pp.548-556 PAPER A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells Masahiro IIDA Masahiro KOGA Kazuki INOUE Motoki AMAGASAKI Yoshinobu ICHIDA Mitsuro SAJI Jun IIDA Toshinori SUEYOSHI
	Summary \| Full Text:PDF (5.2MB) >> Buy this Article

pp.557-566 PAPER A Single-Chip RF Tuner/OFDM Demodulator for Mobile Digital TV Application Yoshimitsu TAKAMATSU Ryuichi FUJIMOTO Tsuyoshi SEKINE Takaya YASUDA Mitsumasa NAKAMURA Takuya HIRAKAWA Masato ISHII Motohiko HAYASHI Hiroya ITO Yoko WADA Teruo IMAYAMA Tatsuro OOMOTO Yosuke OGASAWARA Masaki NISHIKAWA Yoshihiro YOSHIDA Kenji YOSHIOKA Shigehito SAIGUSA Hiroshi YOSHIDA Nobuyuki ITOH
	Summary \| Full Text:PDF (3MB) >> Buy this Article

pp.567-574 PAPER A 500 Mb/s Differential Input Non-coherent BPSK Receiver for UWB-IR Communication Mohiuddin HAFIZ Nobuo SASAKI Takamaro KIKKAWA
	Summary \| Full Text:PDF (1.4MB) >> Buy this Article

pp.575-581 PAPER A 66-dBc Fundamental Suppression Frequency Doubler IC for UWB Sensor Applications Jiangtao SUN Qing LIU Yong-Ju SUH Takayuki SHIBATA Toshihiko YOSHIMASU
	Summary \| Full Text:PDF (1.7MB) >> Buy this Article

pp.582-588 PAPER An Injection-Controlled 10-Gb/s Burst-Mode CDR Circuit for a 1G/10G PON System Hiroaki KATSURAI Hideki KAMITSUNA Hiroshi KOIZUMI Jun TERADA Yusuke OHTOMO Tsugumichi SHIBATA
	Summary \| Full Text:PDF (1.6MB) >> Buy this Article

pp.589-597 PAPER Device Modeling Techniques for High-Frequency Circuits Design Using Bond-Based Design at over 100 GHz Ryuichi FUJIMOTO Kyoya TAKANO Mizuki MOTOYOSHI Uroschanit YODPRASIT Minoru FUJISHIMA
	Summary \| Full Text:PDF (2MB) >> Buy this Article

pp.598-604 PAPER 0.18-V Input Charge Pump with Forward Body Bias to Startup Boost Converter for Energy Harvesting Applications Po-Hung CHEN Koichi ISHIDA Xin ZHANG Yasuyuki OKUMA Yoshikatsu RYU Makoto TAKAMIYA Takayasu SAKURAI
	Summary \| Full Text:PDF (2MB) >> Buy this Article

pp.605-612 PAPER An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic Yimeng ZHANG Leona OKAMURA Tsutomu YOSHIHARA
	Summary \| Full Text:PDF (1.1MB) >> Buy this Article

pp.613-618 PAPER Dicode Partial Response Signaling over Inductively-Coupled Channel Koichi YAMAGUCHI Masayuki MIZUNO
	Summary \| Full Text:PDF (1.2MB) >> Buy this Article

pp.619-626 PAPER A Duobinary Signaling for Asymmetric Multi-Chip Communication Koichi YAMAGUCHI Masayuki MIZUNO
	Summary \| Full Text:PDF (2.2MB) >> Buy this Article

pp.627-634 PAPER A 0.18-µm CMOS X-Band Shock Wave Generator with an On-Chip Dipole Antenna and a Digitally Programmable Delay Circuit for Pulse Beam-Formability Nguyen Ngoc MAI KHANH Masahiro SASAKI Kunihiro ASADA
	Summary \| Full Text:PDF (1.9MB) >> Buy this Article

pp.635-640 BRIEF PAPER A 500 MS/s 600 µW 300 µm² Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS Process Sarang KAZEMINIA Morteza MOUSAZADEH Kayrollah HADIDI Abdollah KHOEI
	Summary \| Full Text:PDF (1.5MB) >> Buy this Article

Regular Section

pp.641-647 PAPER-Optoelectronics Broadening Adjustable Range on Post-Fabrication Resonance Wavelength Trimming of Long-Period Fiber Gratings and the Mechanisms of Resonance Wavelength Shifts Fatemeh ABRISHAMIAN Katsumi MORISHITA
	Summary \| Full Text:PDF (943.5KB) >> Buy this Article

pp.648-653 PAPER-Microwaves, Millimeter-Waves A 7-GHz, Low-Power, Low Phase-Noise Differential Current-Reused VCO Utilizing a Trifilar-Transformer-Feedback Technique Yan-Ru TSENG Tzuen-Hsi HUANG Shang-Hsun WU
	Summary \| Full Text:PDF (789.1KB) >> Buy this Article

pp.654-662 PAPER-Electronic Circuits Cascaded Time Difference Amplifier with Differential Logic Delay Cell Shingo MANDAI Toru NAKURA Tetsuya IIZUKA Makoto IKEDA Kunihiro ASADA
	Summary \| Full Text:PDF (888.9KB) >> Buy this Article

pp.663-669 PAPER-Integrated Electronics A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core Osamu NISHII Yoichi YUYAMA Masayuki ITO Yoshikazu KIYOSHIGE Yusuke NITTA Makoto ISHIKAWA Tetsuya YAMADA Junichi MIYAKOSHI Yasutaka WADA Keiji KIMURA Hironori KASAHARA Hideo MAEJIMA
	Summary \| Full Text:PDF (2.7MB) >> Buy this Article

pp.670-673 BRIEF PAPER-Electronic Circuits A Resistor-Compensation Technique for CMOS Bandgap and Current Reference with Simplified Start-Up Circuit Guo-Ming SUNG Ying-Tsu LAI Chien-Lin LU
	Summary \| Full Text:PDF (772.1KB) >> Buy this Article