IEICE Trans

IEICE TRANSACTIONS on Electronics

Volume E78-C No.7 (Publication Date:1995/07/25)

Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age

pp.765-765 FOREWORD FOREWORD Masahide TAKADA
	Summary \| Full Text:PDF (91.5KB) >> Buy this Article

pp.766-772 INVITED PAPER ULSI Memory for Multimedia Applications Yasuo AKATSUKA Yoichi YANO Shigeo NIITSU Akihiko MORINO
	Summary \| Full Text:PDF (1MB) >> Buy this Article

pp.773-781 INVITED PAPER Emerging Memory Solutions for Graphics Applications Katsumi SUIZU Toshiyuki OGAWA Kazuyasu FUJISHIMA
	Summary \| Full Text:PDF (741.6KB) >> Buy this Article

pp.782-788 PAPER A Synchronous DRAM with New High-Speed I/O Lines Method for the MultiMedia Age Yuji SAKAI Kanji OISHI Miki MATSUMOTO Shoji WADA Tadamichi SAKASHITA Masahiro KATAYAMA
	Summary \| Full Text:PDF (554.4KB) >> Buy this Article

pp.789-796 PAPER NAND-Structured Trench Capacitor Cell Technologies for 256 Mb DRAM and Beyond Takeshi HAMAMOTO Yutaka ISHIBASHI Masami AOKI Yoshihiko SAITOH Takashi YAMADA
	Summary \| Full Text:PDF (854.5KB) >> Buy this Article

pp.797-804 PAPER A Low-Power Synchronous SRAM Macrocell with Latch-Type Fast Sense Circuits Nobutaro SHIBATA Mayumi WATANABE
	Summary \| Full Text:PDF (712KB) >> Buy this Article

pp.805-811 PAPER PLL Timing Design Techniques for Large-Scale, High-Speed, Low-Power, Low-Cost SRAMs Kazuyuki NAKAMURA Shigeru KUHARA Thoru KIMURA Masahide TAKADA Hisamitsu SUZUKI Hiroshi YOSHIDA Tohru YAMAZAKI
	Summary \| Full Text:PDF (685.9KB) >> Buy this Article

pp.812-817 PAPER Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect Yasuo YAMAGUCHI Jun TAKAHASHI Takehisa YAMAGUCHI Tomohisa WADA Toshiaki IWAMATSU Hans-Oliver JOACHIM Yasuo INOUE Tadashi NISHIMURA Natsuro TSUBOUCHI
	Summary \| Full Text:PDF (695.1KB) >> Buy this Article

pp.818-824 PAPER A 65 ns 3 V-only NAND-Flash Memory with New Verify Scheme and Folded Bit-Line Architecture Hiromi NOBUKATA Kenichi SATORI Shinji HIRAMATSU Hideki ARAKAWA
	Summary \| Full Text:PDF (529.3KB) >> Buy this Article

pp.825-831 PAPER Design of a 3.3 V Single Power-Supply 64 Mbit Flash Memory with Dynamic Bit-Line Latch (DBL) Programming Scheme Hiroshi SUGAWARA Toshio TAKESHIMA Hiroshi TAKADA Yoshiaki S. HISAMUNE Kohji KANAMORI Takeshi OKAZAWA Tatsunori MUROTANI Isao SASAKI
	Summary \| Full Text:PDF (664.9KB) >> Buy this Article

pp.832-837 PAPER Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme Katsutaka KIMURA Toshihiro TANAKA Masataka KATO Tetsuo ADACHI Keisuke OGURA Hitoshi KUME
	Summary \| Full Text:PDF (504.8KB) >> Buy this Article

pp.838-844 PAPER BIST Circuit Macro Using Microprogram ROM for LSI Memories Hiroki KOIKE Toshio TAKESHIMA Masahide TAKADA
	Summary \| Full Text:PDF (613.4KB) >> Buy this Article

pp.845-851 PAPER New α-Particle Induced Soft Error Mechanism in a Three Dimensional Capacitor Cell Yukihito OOWAKI Keiji MABUCHI Shigeyoshi WATANABE Kazunori OHUCHI Jun'ichi MATSUNAGA Fujio MASUOKA
	Summary \| Full Text:PDF (605.2KB) >> Buy this Article

pp.852-857 PAPER Use of a Monte Carlo Wiring Yield Simulator to Optimize Design of Random Logic Circuits for Yield Enhancement Hideyuki FUKUHARA Takao KOMATSUZAKI Katsushi BOKU Yoichi MIYAI
	Summary \| Full Text:PDF (545.8KB) >> Buy this Article

Regular Section

pp.858-865 PAPER-Integrated Electronics Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs Tadaaki YAMAUCHI Koji TANAKA Kiyohiro FURUTANI Yoshikazu MOROOKA Hiroshi MIYAMOTO Hideyuki OZAKI
	Summary \| Full Text:PDF (782.8KB) >> Buy this Article

pp.866-872 PAPER-Integrated Electronics 3.0 Gb/s, 272 mW, 8:1 Multiplexer and 4.1 Gb/s, 388 mW, 1:8 Demultiplexer Kimio UEDA Nagisa SASAKI Hisayasu SATO Shunji KUBO Koichiro MASHIKO
	Summary \| Full Text:PDF (689.9KB) >> Buy this Article

pp.873-877 PAPER-Superconductive Electronics Frequency-Dependent Finite-Difference Time-Domain Analysis of High-T_c Superconducting Asymmetric Coplanar Strip Line Masafumi HIRA Yasunobu MIZOMOTO Sadao KURAZONO
	Summary \| Full Text:PDF (341.7KB) >> Buy this Article

pp.878-884 PAPER-Electronic Displays Analysis on Reduction of the Temperature Rise of Deflection Yoke (DY) Rensi MOROOKA Yukitoshi INOUE Katsuhiko SHIOMI
	Summary \| Full Text:PDF (516.7KB) >> Buy this Article

pp.885-886 LETTER-Opto-Electronics Fiber Optic Temperature Sensor Using Two Modes by Holographic Filter Manabu YOSHIKAWA Kazuo ASAKAWA
	Summary \| Full Text:PDF (158.5KB) >> Buy this Article