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IEICE TRANSACTIONS on Electronics
0.35 1.3
Volume E77-C No.8  (Publication Date:1994/08/25)
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Special Section on Superconducting Devices

pp.1149-1149  FOREWORD
FOREWORD
Yoichi OKABE  
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pp.1150-1156  INVITED PAPER-LTS
Interfacial Study of Nb Josephson Junctions with Overlayer Structure
Shin'ichi MOROHASHI  
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pp.1157-1163  INVITED PAPER-LTS
Off-Chip Superconductor Wiring in Multichip Module for Josephson LSI Circuit
Shigeo TANAHASHI  Takanori KUBO  Ryoji JIKUHARA  Gentaro KAJI  Masami TERASAWA  Munecazu TACANO  Hiroshi NAKAGAWA  Masahiro AOYAGI  Itaru KUROSAWA  Susumu TAKADA  
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pp.1164-1168  PAPER-LTS
Fabrication of Nb/AlOx/Nb Josephson Tunnel Junctions by Sputtering Apparatus with Load-Lock System
Akiyoshi NAKAYAMA  Naoki INABA  Shigenori SAWACHI  Kazunari ISHIZU  Yoichi OKABE  
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pp.1169-1175  PAPER-LTS
Low Frequency Noise in Superconducting Nanoconstriction Devices
Michal HATLE  Kazuaki KOJIMA  Katsuyoshi HAMASAKI  
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pp.1176-1180  PAPER-LTS
A Resistor Coupled Josephson Polarity-Convertible Driver
Shuichi NAGASAWA  Shuichi TAHARA  Hideaki NUMATA  Yoshihito HASHIMOTO  Sanae TSUCHIDA  
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pp.1181-1184  PAPER-LTS
LiNbO3 Optical Modulator Using a Superconducting Resonant Electrode
Keiji YOSHIDA  Akihiko NOMURA  Yutaka KANDA  
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pp.1185-1190  INVITED PAPER-HTS
Multi-Channel High Tc SQUID
Hideo ITOZAKI  Saburo TANAKA  Tatsuoki NAGAISHI  Hisashi KADO  
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pp.1191-1198  PAPER-HTS
Growth and Tunneling Properties of (Bi, Pb)2Sr2CaCu2Oy Single Crystals
Akinobu IRIE  Masayuki SAKAKIBARA  Gin-ichiro OYA  
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pp.1199-1203  PAPER-HTS
Fabrication of All-Epitaxial High-Tc SIS Tunnel Structures
Yasuo TAZOH  Junya KOBAYASHI  Masashi MUKAIDA  Shintaro MIYAZAWA  
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pp.1204-1208  PAPER-HTS
High Tc Superconductor Joint with Low Loss and High Strength
Naobumi SUZUKI  Osamu ISHII  Osamu MICHIKAMi  
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pp.1209-1217  PAPER-HTS
The Improvement of Compositional Distribution in Depth and Surface Morphology of YBa2Cu3O7-δ-SrTiOx Multilayers
Chien Chen DIAO  Gin-ichiro OYA  
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pp.1218-1223  PAPER-HTS
I-V Characteristic of YBCO Step-Edge Josephson Junction
Keiichi YAMAGUCHI  Shuichi YOSHIKAWA  Tsuyoshi TAKENAKA  Syuichi FUJINO  Kunihiko HAYASHI  Tsutomu MITSUZUKA  Katsumi SUZUKI  Youichi ENOMOTO  
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pp.1224-1228  PAPER-HTS
Weak Link Array Junctions in EuBa2Cu3O7-x Films for Microwave Detection
Koji TSURU  Osamu MICHIKAMI  
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pp.1229-1233  PAPER-HTS
Properties of Thin-Film Thermal Switches for High-Tc Superconductive Filter
Yasuhiro NAGAI  Naobumi SUZUKI  Osamu MICHIKAMI  
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pp.1234-1241  PAPER-HTS
A Method for Measuring Surface Impedance of Superconductor and Dielectric Characteristics of Substrate by Using Strip Line Resonator
Akira TAKETOMI  Kunio SAWAYA  Saburo ADACHI  Shigetoshi OHSHIMA  Norihiko YAOI  
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pp.1242-1248  PAPER-HTS
Analysis of High-Tc Superconducting Microstrip Antenna Using Modified Spectral Domain Moment Method
Nozomu ISHII  Toru FUKASAWA  Kiyohiko ITOH  
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Special Section on High Speed and High Density Multi Functional LSI Memories

pp.1249-1250  FOREWORD
FOREWORD
Fujio MASUOKA  
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pp.1251-1259  INVITED PAPER-Non-volatile Memory
Sub-Halfmicron Flash Memory Technologies
Koji SAKUI  Fujio MASUOKA  
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pp.1260-1269  PAPER-Non-volatile Memory
A 3 Volt 1 Mbit Full-Featured EEPROM Using a Highly-Reliable MONOS Device Technology
Shin-ichi MINAMI  Kazuaki UJIIE  Masaaki TERASAWA  Kazuhiro KOMORI  Kazunori FURUSAWA  Yoshiaki KAMIGAKI  
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pp.1270-1278  PAPER-Non-volatile Memory
Highly Reliable Flash Memories Fabricated by in-situ Multiple Rapid Thermal Processing
Takahisa HAYASHI  Yoshiyuki KAWAZU  Akira UCHIYAMA  Hisashi FUKUDA  
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pp.1279-1286  PAPER-Non-volatile Memory
Improved Array Architectures of DINOR for 0.5 µm 32 M and 64 Mbit Flash Memories
Hiroshi ONODA  Yuichi KUNORI  Kojiro YUZURIHA  Shin-ichi KOBAYASHI  Kiyohiko SAKAKIBARA  Makoto OHI  Atsushi FUKUMOTO  Natsuo AJIKA  Masahiro HATANAKA  Hirokazu MIYOSHI  
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pp.1287-1295  PAPER-Non-volatile Memory
Data Retention Characteristics of Flash Memory Cells after Write and Erase Cycling
Seiichi ARITOME  Riichiro SHIROTA  Koji SAKUI  Fujio MASUOKA  
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pp.1296-1302  PAPER-Non-volatile Memory
A High Capacitive Coupling Ratio (HiCR) Cell for Single 3 Volt Power Supply Flash Memories
Kohji KANAMORI  Yosiaki S. HISAMUNE  Taishi KUBOTA  Yoshiyuki SUZUKI  Masaru TSUKIJI  Eiji HASEGAWA  Akihiko ISHITANI  Takeshi OKAZAWA  
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pp.1303-1315  INVITED PAPER-DRAM
High Speed DRAMs with Innovative Architectures
Shigeo OHSHIMA  Tohru FURUYAMA  
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pp.1316-1322  PAPER-DRAM
PATDRAM: Pixel-Aligned Triple-Port DRAM
Toshiki MORI  Tetsuyuki FUKUSHIMA  Akifumi KAWAHARA  Katsumi WADA  Akihiro MATSUMOTO  
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pp.1323-1327  PAPER-DRAM
A Distributive Serial Multi-Bit Parallel Test Scheme for Large Capacity DRAMs
Tadahiko SUGIBAYASHI  Isao NARITAKE  Hiroshi TAKADA  Ken INOUE  Ichiro YAMAMOTO  Tatsuya MATANO  Mamoru FUJITA  Yoshiharu AIMOTO  Toshio TAKESHIMA  Satoshi UTSUGI  
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pp.1328-1333  PAPER-DRAM
A 180 MHz Multiple-Registered 16 Mbit SDRAM with Flexible Timing Scheme
Hisashi IWAMOTO  Naoya WATANABE  Akira YAMAZAKI  Seiji SAWADA  Yasumitsu MURAI  Yasuhiro KONISHI  Hiroshi ITOH  Masaki KUMANOYA  
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pp.1334-1342  PAPER-DRAM
High-Speed Circuit Techniques for Battery-Operated 16 Mbit CMOS DRAM
Toshikazu SUZUKI  Toru IWATA  Hironori AKAMATSU  Akihiro SAWADA  Toshiaki TSUJI  Hiroyuki YAMAUCHI  Takashi TANIGUCHI  Tsutomu FUJITA  
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pp.1343-1350  INVITED PAPER-General Technology
Process and Device Technologies for Subhalf-Micron LSI Memory
Katsuhiro TSUKAMOTO  Hiroaki MORIMOTO  
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pp.1351-1360  INVITED PAPER-General Technology
Low-Voltage and Low-Power ULSI Circuit Techniques
Masakazu AOKI  Kiyoo ITOH  
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pp.1361-1368  PAPER-General Technology
CMOS Embedded RAMs for Digital Communication Systems
Masao MIZUKAMI  Yoichi SATOH  Takahiko KOZAKI  Yasuo MIKAMI  
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pp.1369-1376  PAPER-General Technology
Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)
Masahiro SHIMIZU  Masahide INUISHI  Katsuhiro TSUKAMOTO  Hideaki ARIMA  Hirokazu MIYOSHI  
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pp.1377-1384  PAPER-General Technology
A Flexible Search Managing Circuitry for High-Density Dynamic CAMs
Takeshi HAMAMOTO  Tadato YAMAGATA  Masaaki MIHARA  Yasumitsu MURAI  Toshifumi KOBAYASHI  Hideyuki OZAKI  
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pp.1385-1394  PAPER-General Technology
High-Density Full-CMOS SRAM Cell Technology with a Deep Sub-Micron Spacing between nMOS and pMOSFET
Fumitomo MATSUOKA  Kazunari ISHIMARU  Hiroshi GOJOHBORI  Hidetoshi KOIKE  Yukari UNNO  Manabu SAI  Toshiyuki KONDO  Ryuji ICHIKAWA  Masakazu KAKUMU  
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pp.1395-1403  PAPER-General Technology
A Bipolar-Based 0.5 µm BiCMOS Technology on Bonded SOI for High-Speed LSIs
Makoto YOSHIDA  Toshiro HIRAMOTO  Tsuyoshi FUJIWARA  Takashi HASHIMOTO  Tetsuya MURAYA  Shigeharu MURATA  Kunihiko WATANABE  Nobuo TAMBA  Takahide IKEDA  
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