IEICE Trans

Online ISSN : 1745-1353

IEICE TRANSACTIONS on Electronics

Volume E89-C No.3 (Publication Date:2006/03/01)

Special Section on VLSI Design Technology in the Sub-100 nm Era

pp.211-212 FOREWORD FOREWORD Akira MATSUZAWA
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pp.213-220 INVITED PAPER System LSI: Challenges and Opportunities Tadahiro KURODA
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pp.221-229 INVITED PAPER Design Philosophy of a Networking-Oriented Data-Driven Processor: CUE Hiroaki NISHIKAWA
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pp.230-242 PAPER-System LSIs and Microprocessors VLSI Architecture Study of a Real-Time Scalable Optical Flow Processor for Video Segmentation Noriyuki MINEGISHI Junichi MIYAKOSHI Yuki KURODA Tadayoshi KATAGIRI Yuki FUKUYAMA Ryo YAMAMOTO Masayuki MIYAMA Kousuke IMAMURA Hideo HASHIMOTO Masahiko YOSHIMOTO
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pp.243-249 PAPER-System LSIs and Microprocessors A Fast Elliptic Curve Cryptosystem LSI Embedding Word-Based Montgomery Multiplier Jumpei UCHIDA Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
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pp.250-262 INVITED PAPER Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond Koichiro ISHIBASHI Tetsuya FUJIMOTO Takahiro YAMASHITA Hiroyuki OKADA Yukio ARIMA Yasuyuki HASHIMOTO Kohji SAKATA Isao MINEMATSU Yasuo ITOH Haruki TODA Motoi ICHIHASHI Yoshihide KOMATSU Masato HAGIWARA Toshiro TSUKADA
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pp.263-270 INVITED PAPER Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI Yukihito OOWAKI Shinichiro SHIRATAKE Toshihide FUJIYOSHI Mototsugu HAMADA Fumitoshi HATORI Masami MURAKATA Masafumi TAKAHASHI
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pp.271-279 PAPER-Low Power Techniques Low Dynamic Power and Low Leakage Power Techniques for CMOS Motion Estimation Circuits Nobuaki KOBAYASHI Tomomi EI Tadayoshi ENOMOTO
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pp.280-286 PAPER-Low Power Techniques Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating, Dual-V_TH/V_DD and Micro-V_DD-Hopping Canh Quang TRAN Hiroshi KAWAGUCHI Takayasu SAKURAI
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pp.287-294 PAPER-Low Power Techniques Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core Tetsuya YAMADA Masahide ABE Yusuke NITTA Kenji OGURA Manabu KUSAOKE Makoto ISHIKAWA Motokazu OZAWA Kiwamu TAKADA Fumio ARAKAWA Osamu NISHII Toshihiro HATTORI
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pp.295-299 PAPER-Low Power Techniques A 1 V Phase Locked Loop with Leakage Compensation in 0.13 µm CMOS Technology Chi-Nan CHUANG Shen-Iuan LIU
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pp.300-313 INVITED PAPER Circuits for CMOS High-Speed I/O in Sub-100 nm Technologies Hirotaka TAMURA Masaya KIBUNE Hisakatsu YAMAGUCHI Kouichi KANDA Kohtaroh GOTOH Hideki ISHIDA Junji OGAWA
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pp.314-319 PAPER-Interface and Interconnect Techniques Channel-Count-Independent BIST for Multi-Channel SerDes Kouichi YAMAGUCHI Muneo FUKAISHI
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pp.320-326 PAPER-Interface and Interconnect Techniques A 1.2 Gbps Non-contact 3D-Stacked Inter-Chip Data Communications Technology Daisuke MIZOGUCHI Noriyuki MIURA Takayasu SAKURAI Tadahiro KURODA
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pp.327-333 PAPER-Interface and Interconnect Techniques Alternate Self-Shielding for High-Speed and Reliable On-Chip Global Interconnect Yoichi YUYAMA Akira TSUCHIYA Kazutoshi KOBAYASHI Hidetoshi ONODERA
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pp.334-341 PAPER-Interface and Interconnect Techniques An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques Masahiro NOMURA Taku OHSAWA Koichi TAKEDA Yoetsu NAKAZAWA Yoshinori HIROTA Yasuhiko HAGIHARA Naoki NISHI
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pp.342-348 INVITED PAPER Variability: Modeling and Its Impact on Design Hidetoshi ONODERA
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pp.349-355 PAPER-Signal Integrity and Variability A Statistical Quality Model for Delay Testing Yasuo SATO Shuji HAMADA Toshiyuki MAEDA Atsuo TAKATORI Seiji KAJIHARA
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pp.356-363 PAPER-Signal Integrity and Variability Multi-Ported Register File for Reducing the Impact of PVT Variation Yuuichirou IKEDA Masaya SUMITA Makoto NAGATA
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pp.364-369 PAPER-Signal Integrity and Variability Feedforward Active Substrate Noise Cancelling Based on di/dt of Power Supply Toru NAKURA Makoto IKEDA Kunihiro ASADA
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pp.370-376 PAPER-Signal Integrity and Variability On-Chip Detector for Single-Event Noise Sensing with Voltage Scaling Function Mohamed ABBAS Makoto IKEDA Kunihiro ASADA
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pp.377-383 PAPER-CAD Cell Library Development Methodology for Throughput Enhancement of Character Projection Equipment Makoto SUGIHARA Taiga TAKATA Kenta NAKAMURA Ryoichi INANAMI Hiroaki HAYASHI Katsumi KISHIMOTO Tetsuya HASEBE Yukihiro KAWANO Yusuke MATSUNAGA Kazuaki MURAKAMI Katsuya OKUMURA
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pp.384-391 PAPER-Soft Error Soft Error Hardened Latch Scheme with Forward Body Bias in a 90-nm Technology and Beyond Yoshihide KOMATSU Yukio ARIMA Koichiro ISHIBASHI
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pp.392-394 LETTER-Interconnect Technique Trends of On-Chip Interconnects in Deep Sub-Micron VLSI Danardono Dwi ANTONO Kenichi INAGAKI Hiroshi KAWAGUCHI Takayasu SAKURAI
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Regular Section

pp.395-402 PAPER-Electromagnetic Theory Propagation Analysis of Circular Surface Waveguides with a Periodically Corrugated Ground Plane Chin-Jui LAI Ching-Her LEE Chung-I G. HSU Jean-Fu KIANG
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pp.403-409 PAPER-Microwaves, Millimeter-Waves Aperture-Backed Microstrip-Line Stepped-Impedance Resonators and Transformers for Performance-Enhanced Bandpass Filters Hang WANG Lei ZHU
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pp.410-419 PAPER-Electronic Components Extraction of LRGC Matrices for 8-Coupled Uniform Lossy Transmission Lines Using 2-Port VNA Measurements Hyun Bae LEE Kyoungho LEE Hae Kang JUNG Hong June PARK
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pp.420-428 PAPER-Integrated Electronics A Fast Switching Low Phase Noise CMOS Frequency Synthesizer with a New Coarse Tuning Method for PHS Applications Kang-Yoon LEE Hyunchul KU Young Beom KIM
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pp.429-433 PAPER-Electronic Displays Evaluation of the Fusional Limit between the Front and Rear Images in Depth-Fused 3-D Visual Illusion Hideaki TAKADA Shiro SUYAMA Munekazu DATE
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pp.434-436 LETTER-Electromagnetic Theory A New Approach to Mixed-Path Propagation of Surface Wave Bin-hao JIANG
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pp.437-439 LETTER-Lasers, Quantum Electronics Quantum Noise and Feed-Back Noise in Blue-Violet InGaN Semiconductor Lasers Kenjiro MATSUOKA Kazushi SAEKI Eiji TERAOKA Minoru YAMADA Yuji KUWAMURA
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pp.440-442 LETTER-Electronic Circuits Low Power Low Phase Noise LC Quadrature VCO Topology Ji-Hoon KIM Hyung-Joun YOO
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