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IEICE TRANSACTIONS on Electronics
Volume E83-C No.8  (Publication Date:2000/08/25)
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Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99)

pp.1173-1174  FOREWORD
FOREWORD
Kenji NISHI  
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pp.1175-1182  PAPER-Gate Tunneling Simulation
Modeling and Simulation of Tunneling Current in MOS Devices Including Quantum Mechanical Effects
Andrea GHETTI  Jeff BUDE  Paul SILVERMAN  Amal HAMAD  Hem VAIDYA  
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pp.1183-1188  PAPER-Gate Tunneling Simulation
Homogeneous Transport in Silicon Dioxide Using the Spherical-Harmonics Expansion of the BTE
Lucia SCOZZOLI  Susanna REGGIANI  Massimo RUDAN  
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pp.1189-1193  PAPER-Gate Tunneling Simulation
Simulation of Direct Tunneling through Stacked Gate Dielectrics by a Fully Integrated 1D-Schrodinger-Poisson Solver
Andreas WETTSTEIN  Andreas SCHENK  Wolfgang FICHTNER  
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pp.1194-1202  PAPER-Gate Tunneling Simulation
Comparison between Device Simulators for Gate Current Calculation in Ultra-Thin Gate Oxide n-MOSFETs
Eric CASSAN  Sylvie GALDIN  Philippe DOLLFUS  Patrice HESTO  
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pp.1203-1211  INVITED PAPER-Device Modeling and Simulation
Increasing Importance of Electronic Thermal Noise in Sub-0.1 µm Si-MOSFETs
Nobuyuki SANO  
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pp.1212-1217  PAPER-Device Modeling and Simulation
Monte Carlo Simulation of Sub-0.1µm Devices with Schottky Contact Model
Kazuya MATSUZAWA  Ken UCHIDA  Akira NISHIYAMA  
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pp.1218-1223  PAPER-Device Modeling and Simulation
A Monte-Carlo Method to Analyze the Small Signal Response of the Semiconductor Carriers
Mihail NEDJALKOV  Hans KOSINA  Siegfried SELBERHERR  
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pp.1224-1227  PAPER-Device Modeling and Simulation
RF Analysis Methodology for Si and SiGe FETs Based on Transient Monte Carlo Simulation
Scott ROY  Sava KAYA  Asen ASENOV  John R. BARKER  
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pp.1228-1234  PAPER-Device Modeling and Simulation
Full-Band Monte Carlo Device Simulation of a Si/SiGe-HBT with a Realistic Ge Profile
Christoph JUNGEMANN  Stefan KEITH  Bernd MEINERZHAGEN  
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pp.1235-1241  PAPER-Device Modeling and Simulation
Simulation of Multi-Band Quantum Transport Reflecting Realistic Band Structure
Matsuto OGAWA  Takashi SUGANO  Ryuichiro TOMINAGA  Tanroku MIYOSHI  
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pp.1242-1246  PAPER-Device Modeling and Simulation
Effect of the Tunneling Rates on the Conductance Characteristics of Single-Electron Transistors
Andreas SCHOLZE  Andreas SCHENK  Wolfgang FICHTNER  
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pp.1247-1252  PAPER-Process Modeling and Simulation
Molecular Dynamics Calculation Studies of Interstitial-Si Diffusion and Arsenic Ion Implantation Damage
Masami HANE  Takeo IKEZAWA  Akio FURUKAWA  
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pp.1253-1258  PAPER-Process Modeling and Simulation
Atomic Scale Simulation of Extended Defects: Monte Carlo Approach
Jaehee LEE  Taeyoung WON  
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pp.1259-1266  PAPER-Process Modeling and Simulation
A Computationally Efficient Method for Three-Dimensional Simulation of Ion Implantation
Alexander BURENKOV  Klaus TIETZEL  Andreas HOSSINGER  Jurgen LORENZ  Heiner RYSSEL  Siegfried SELBERHERR  
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pp.1267-1274  PAPER-Process Modeling and Simulation
3-Dimensional Process Simulation of Thermal Annealing of Low Dose Implanted Dopants in Silicon
Vincent SENEZ  Jerome HERBAUX  Thomas HOFFMANN  Evelyne LAMPIN  
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pp.1275-1280  INVITED PAPER-Simulation Methodology and Environment
Application of Technology CAD in Process Development for High Performance Logic and System-on-Chip in IC Foundry
Boon-Khim LIEW  Chih-Chiang WANG  Carlos H. DIAZ  Shien-Yang WU  Jack Yuan-Chen SUN  Yai-Fen LIN  Di-Son KUO  Hua-Tai LIN  Anthony YEN  
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pp.1281-1287  INVITED PAPER-Simulation Methodology and Environment
Advanced Process/Device Modeling and Its Impact on the CMOS Design Solution
Shigetaka KUMASHIRO  
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pp.1288-1294  PAPER-Simulation Methodology and Environment
Systematic Yield Simulation Methodology Applied to Fully-Depleted SOI MOSFET Process
Noriyuki MIURA  Hirokazu HAYASHI  Koichi FUKUDA  Kenji NISHI  
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pp.1295-1302  PAPER-Simulation Methodology and Environment
Delay Library Generation with High Efficiency and Accuracy on the Basis of RSM
Hisako SATO  Yuko ITO  Hisaaki KUNITOMO  Hiroyuki BABA  Satoru ISOMURA  Hiroo MASUDA  
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pp.1303-1310  PAPER-Simulation Methodology and Environment
Practical Inverse Modeling with SIESTA
Rudolf STRASSER  Siegfried SELBERHERR  
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pp.1311-1316  INVITED PAPER-Circuit Applications
Interconnect Modeling in Deep-Submicron Design
Won-Young JUNG  Soo-Young OH  Jeong-Taek KONG  Keun-Ho LEE  
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pp.1317-1323  PAPER-Circuit Applications
Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits
Ken-ichiro SONODA  Motoaki TANIZAWA  Kiyoshi ISHIKAWA  Norihiko KOTANI  Tadashi NISHIMURA  
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pp.1324-1330  PAPER-Circuit Applications
A BSIM3v3 and DFIM Based Ferroelectric Field Effect Transistor Model
Marc ULLMANN  Holger GOEBEL  Heinz HOENIGSCHMID  Thomas HANEDER  
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pp.1331-1337  INVITED PAPER-Numerics
New Developments and Old Problems in Grid Generation and Adaptation for TCAD Applications
Jens KRAUSE  Bernhard SCHMITHUSEN  Luis VILLABLANCA  Wolfgang FICHTNER  
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pp.1338-1342  PAPER-Numerics
Control and Improvement of Surface Triangulation for Three-Dimensional Process Simulation
Eberhard BAR  Jurgen LORENZ  
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pp.1343-1348  PAPER-Numerics
A Three-Dimensional Mesh Generation Method with Precedent Triangulation of Boundary
Katsuhiko TANAKA  Akio NOTSU  Akio FURUKAWA  
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pp.1349-1355  PAPER-Numerics
An Advancing Front Meshing Algorithm Using NURBS for Semiconductor Process Simulation
Sangho YOON  Jaehee LEE  Sukin YOON  Ohseob KWON  Taeyoung WON  
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