Online ISSN : 1745-1337

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
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0.42 1.1
Volume E90-A No.4  (Publication Date:2007/04/01)
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Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa

pp.705-706  FOREWORD
FOREWORD
Yusuke MATSUNAGA   
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pp.707-714  PAPER
Control-Invariance of Sampled-Data Hybrid Systems with Clocked Events and Jitters
Yoshiyuki TSUCHIE  Toshimitsu USHIO  
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pp.715-723  PAPER
Design of a Neural Network Chip for the Burst ID Model with Ability of Burst Firing
Shinya SUENAGA  Yoshihiro HAYAKAWA  Koji NAKAJIMA  
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pp.724-731  PAPER
Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect
Yasuhiro OGASAHARA  Masanori HASHIMOTO  Takao ONOYE  
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pp.732-740  PAPER
Behavioral Circuit Macromodeling and Analog LSI Implementation for Automobile Engine Intake System
Zhangcai HUANG  Yasuaki INOUE  Hong YU  Jun PAN  Yun YANG  Quan ZHANG  Shuai FANG  
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pp.741-747  PAPER
Fast Methods to Estimate Clock Jitter due to Power Supply Noise
Koutaro HACHIYA  Takayuki OHSHIMA  Hidenari NAKASHIMA  Masaaki SODA  Satoshi GOTO  
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pp.748-755  PAPER
A Low-Power Sub-1-V Low-Voltage Reference Using Body Effect
Jun PAN  Yasuaki INOUE  Zheng LIANG  Zhangcai HUANG  Weilun HUANG  
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pp.756-763  PAPER
Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation
Ming SHAO  Zhenyu LIU  Satoshi GOTO  Takeshi IKENAGA  
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pp.764-770  PAPER
Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation
Yang SONG  Zhenyu LIU  Takeshi IKENAGA  Satoshi GOTO  
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pp.771-777  PAPER
Lossless Data Hiding in the Spatial Domain for High Quality Images
Hong Lin JIN  Masaaki FUJIYOSHI  Hitoshi KIYA  
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pp.778-783  PAPER
Global Noise Estimation Based on Tensor Product Expansion with Absolute Error
Akitoshi ITAI  Hiroshi YASUKAWA  Ichi TAKUMI  Masayasu HATA  
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pp.784-791  PAPER
A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture
Shin'ichi KOUYAMA  Tomonori IZUMI  Hiroyuki OCHI  Yukihiro NAKAMURA  
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pp.792-799  PAPER
A Simultaneous Module Selection, Scheduling, and Allocation Method Considering Operation Chaining with Multi-Functional Units
Tsuyoshi SADAKATA  Yusuke MATSUNAGA  
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pp.800-807  PAPER
Gate-Level Register Relocation in Generalized Synchronous Framework for Clock Period Minimization
Yukihide KOHIRA  Atsushi TAKAHASHI  
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pp.808-814  PAPER
Proposal of Metrics for SSTA Accuracy Evaluation
Hiroyuki KOBAYASHI  Nobuto ONO  Takashi SATO  Jiro IWAI  Hidenari NAKASHIMA  Takaaki OKUMURA  Masanori HASHIMOTO  
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pp.815-822  PAPER
A Fast Characterizing Method for Large Embedded Memory Modules on SoC
Masahiko OMURA  Toshiki KANAMOTO  Michiko TSUKAMOTO  Mitsutoshi SHIROTA  Takashi NAKAJIMA  Masayuki TERAI  
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pp.823-828  PAPER
A Surjective Mapping from Permutations to Room-to-Room Floorplans
Ryo FUJIMAKI  Toshihiko TAKAHASHI  
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pp.829-835  PAPER
WF-Net Based Modeling and Soundness Verification of Interworkflows
Shingo YAMAGUCHI  Hajime MATSUO  Qi-Wei GE  Minoru TANAKA  
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pp.836-846  PAPER
A Tableau Construction Approach to Control Synthesis of FSMs Using Simulation Relations
Yoshisato SAKAI  
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pp.847-856  PAPER
Performance Comparison of Algorithms for the Dynamic Shortest Path Problem
Satoshi TAOKA  Daisuke TAKAFUJI  Takashi IGUCHI  Toshimasa WATANABE  
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Regular Section

pp.857-864  PAPER-Information Security
Autocorrelation and Linear Complexity of the New Generalized Cyclotomic Sequences
Tongjiang YAN  Rong SUN  Guozhen XIAO  
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pp.865-871  PAPER-Neural Networks and Bioengineering
Competing Behavior of Two Kinds of Self-Organizing Maps and Its Application to Clustering
Haruna MATSUSHITA  Yoshifumi NISHIO  
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pp.872-874  LETTER-Systems and Control
Computing Transformation Matrix for Bilinear S-Z Transformation
Younseok CHOO  
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pp.875-878  LETTER-VLSI Design Technology and CAD
Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis
Eui-Young CHUNG  Hyuk-Jun LEE  Sung Woo CHUNG  
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pp.879-884  LETTER-Neural Networks and Bioengineering
MLP/BP-Based Soft Decision Feedback Equalization with Bit-Interleaved TCM for Wireless Applications
Terng-Ren HSU  Chien-Ching LIN  Terng-Yin HSU  Chen-Yi LEE  
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