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IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
0.34 1.1
Volume E86-A No.2  (Publication Date:2003/02/01)
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Special Section on Analog Circuit Techniques and Related Topics

pp.251-251  FOREWORD
FOREWORD
Yoshifumi SEKINE  
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pp.252-261  PAPER
A Framework for Macromodeling and Mixed-Mode Simulation of Circuits/Interconnects and Electromagnetic Radiations
Takayuki WATANABE  Hideki ASAI  
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pp.262-267  PAPER
A 1-V 2-GHz CMOS Up-Converter Using Self-Switching Mixers
Toshiyuki UMEDA  Shoji OTAKA  Kenji KOJIMA  Tetsuro ITAKURA  
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pp.268-272  PAPER
An Ultra-Broad-Band Bridge-Type MMIC Switch Operating up to Millimeter-Wave Bands
Nobuaki IMAI  Akira MINAKAWA  
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pp.273-279  PAPER
An Empirical Study of a Coplanar Bandpass Filter with Attenuation Poles Using Short-Ended Half-Wavelength Resonators
Kouji WADA  Yoshiyuki AIHARA  Osamu HASHIMOTO  Hiroshi HARADA  
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pp.280-287  PAPER
A Variable Gain Amplifier Using a Photo Coupler for a Low Frequency IF Amplifier Stage
Yoshio TSUDA  Shigeru SHIMAMOTO  
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pp.288-298  PAPER
Scalable Parasitic Components Model of CMOS for RF Circuit Design
Nobuyuki ITOH  Tatsuya OHGURO  Kazuhiro KATOH  Hideki KIMIJIMA  Shin-ichiro ISHIZUKA  Kenji KOJIMA  Hiroyuki MIYAKAWA  
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pp.299-303  PAPER
A Consideration on Very Low Phase Noise Oscillator Circuit
Yukinori SAKUTA  Yuji ARAI  Yoshifumi SEKINE  
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pp.304-312  PAPER
A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis
Hideyuki NOSAKA  Yo YAMAGUCHI  Akihiro YAMAGISHI  Masahiro MURAGUCHI  
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pp.313-317  PAPER
8-mW, 1-V, 100-MSample/s, 6-bit A/D Converter Using a Latched Comparator Operating in the Triode Region
Jun TERADA  Yasuyuki MATSUYA  Fumiharu MORISAWA  Yuichi KADO  
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pp.318-326  PAPER
Realization of Leapfrog Filters Using Current Differential Buffered Amplifiers
Worapong TANGSRIRAT  Wanlop SURAKAMPONTORN  Nobuo FUJII  
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pp.327-334  PAPER
Rail-to-Rail V-I Conversion Using a Pair of Single Channel MOSFETs Operating in Plural Regions
Takahide SATO  Shigetaka TAKAGI  Nobuo FUJII  
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pp.335-341  PAPER
A Low Voltage Floating Resistor Circuit Having Both Positive and Negative Resistance Values
Shashidhar TANTRY  Yasuyuki HIRAKU  Takao OURA  Teru YONEYAMA  Hideki ASAI  
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pp.342-349  PAPER
Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application
Muneo KUSHIMA  Koichi TANNO  Okihiko ISHIZUKA  
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pp.350-356  PAPER
Mapping Circuit for Rail-to-Rail Operation
Kawori TAKAKUBO  Hajime TAKAKUBO  Yohei NAGATAKE  Shigetaka TAKAGI  Nobuo FUJII  
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pp.357-363  PAPER
An Equivalent MOSFET Cell Using Adaptively Biased Source-Coupled Pair
Hiroki SATO  Akira HYOGO  Keitaro SEKINE  
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pp.364-370  PAPER
Automated Design of Analog Circuits Using a Cell-Based Structure
Hajime SHIBATA  Soji MORI  Nobuo FUJII  
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pp.371-380  PAPER
High-Efficiency Charge-Pump Circuits which Use a 0.5Vdd-Step Pumping Method
Takao MYONO  Tatsuya SUZUKI  Akira UEMOTO  Shuhei KAWAI  Takashi IIJIMA  Nobuyuki KUROIWA  Haruo KOBAYASHI  
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pp.381-386  PAPER
Spread-Spectrum Clocking in Switching Regulators for EMI Reduction
Takayuki DAIMON  Hiroshi SADAMURA  Takayuki SHINDOU  Haruo KOBAYASHI  Masashi KONO  Takao MYONO  Tatsuya SUZUKI  Shuhei KAWAI  Takashi IIJIMA  
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pp.387-395  PAPER
Motion Detecting Artificial Retina Model by Two-Dimensional Multi-Layered Analog Electronic Circuits
Masashi KAWAGUCHI  Takashi JIMBO  Masayoshi UMENO  
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pp.396-403  PAPER
A High-Resolution CMOS Image Sensor with Hadamard Transform Function
Kousuke KATAYAMA  Atsushi IWATA  
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pp.404-410  PAPER
A Study of a Stable Driving Circuit for Arbitrary-Shaped Electroluminescent Elements
Yasuyuki KITADA  Noboru MASUDA  Hiroshi NAKANE  Sadao YAMAZAKI  
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pp.411-413  LETTER
Voltage-Mode Universal Biquadratic Filter Using Two OTAs and Two Capacitors
Jiun-Wei HORNG  
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pp.414-418  LETTER
A CMOS Current-Mode Band-Pass Filter Using Q-Enhancement Technique
Yuhki MARUYAMA  Akira HYOGO  Keitaro SEKINE  
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pp.419-423  LETTER
Substrate Coupling Simulation Suitable for Conventional CAD Tools
Tomohisa KIMURA  
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pp.424-427  LETTER
CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network
Katsutoshi SAEKI  Yoshifumi SEKINE  
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Regular Section

pp.428-433  PAPER-Digital Signal Processing
An IIR ALE Based on Constrained FIR Filter
James OKELLO  Masashi MIZUNO  Yoshio ITOH  
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pp.434-443  PAPER-Nonlinear Problems
Finding All Solutions of Transistor Circuits Using the Dual Simplex Method
Kiyotaka YAMAMURA  Osamu NAKAMURA  
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pp.444-461  PAPER-VLSI Design Technology and CAD
A Hierarchical Cost Estimation Technique for High Level Synthesis
Mahmoud MERIBOUT  Masato MOTOMURA  
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pp.462-471  PAPER-VLSI Design Technology and CAD
An Algorithm for Exact Extended Algebraic Division
Giuseppe CARUSO  
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pp.472-479  PAPER-VLSI Design Technology and CAD
Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder
Chung-Jr LIAN  Zhong-Lan YANG  Hao-Chieh CHANG  Liang-Gee CHEN  
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pp.480-486  PAPER-Coding Theory
On Asymptotic Elias Bound for Euclidean Space Codes over Distance-Uniform Signal Sets
Balaji Sundar RAJAN  Ganapathy VISWANATH  
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pp.487-496  PAPER-Spread Spectrum Technologies and Applications
Cellular Architecture and Downlink Performance Evaluation of a Dual-Polarized Multimode CDMA Based Local Multipoint Distribution System
Fu-Tung WANG  Mu-King TSAY  
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pp.497-503  PAPER-Image
Nonseparable 2D Lossless Transforms Based on Multiplier-Free Lossless WHT
Kunitoshi KOMATSU  Kaoru SEZAKI  
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pp.504-508  LETTER-Analog Signal Processing
Algorithms for Digital Correction of ADC Nonlinearity
Haruo KOBAYASHI  Hiroshi YAGI  Takanori KOMURO  Hiroshi SAKAYORI  
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pp.509-512  LETTER-Analog Signal Processing
A Realization of Multiple Circuit Transfer Functions Using OTA-C Integrator Loop Structure
Takao TSUKUTANI  Masami HIGASHIMURA  Yasutomo KINUGASA  Yasuaki SUMI  Yutaka FUKUI  
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pp.513-514  LETTER-Information Security
Traceability on Stadler et al.'s Fair Blind Signature Scheme
Min-Shiang HWANG  Cheng-Chi LEE  Yan-Chi LAI  
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pp.515-516  LETTER-Information Security
A Universal Forgery on Araki et al.'s Convertible Limited Verifier Signature Scheme
Fangguo ZHANG  Kwangjo KIM  
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