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IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Volume E85-A No.2  (Publication Date:2002/02/01)
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Special Section on Analog Circuit Techniques and Related Topics

pp.281-281  FOREWORD
FOREWORD
Keitaro SEKINE  
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pp.282-285  INVITED EDITORIAL
The Changing Face of Analog IC Design
Christopher W. MANGELSDORF  
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pp.286-292  PAPER
A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer
Osamu WATANABE  Takafumi YAMAJI  Tetsuro ITAKURA  Ichiro HATTORI  
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pp.293-299  PAPER
A 1-V 2-GHz RF Receiver with 49 dB of Image Rejection in CMOS/SIMOX
Mamoru UGAJIN  Junichi KODATE  Tsuneo TSUKAHARA  
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pp.300-308  PAPER
2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply
Hiroshi KOMURASAKI  Kazuya YAMAMOTO  Hideyuki WAKADA  Tetsuya HEIMA  Akihiko FURUKAWA  Hisayasu SATO  Takahiro MIKI  Naoyuki KATO  Akira HYOGO  Keitaro SEKINE  
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pp.309-315  PAPER
An Integrable Image Rejection System Using a Complex Analog Filter with Variable Bandwidth and Center Frequency Characteristics
Cosy MUTO  Hiroshi HOSHIKAWA  
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pp.316-323  PAPER
A Digitally Programmable CMOS Universal Biquad Filter Using Current-Mode Integrators
Yuhki MARUYAMA  Akira HYOGO  Keitaro SEKINE  
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pp.324-328  PAPER
A Cascode Crystal Oscillator Suitable for Integrated Circuits
Koji HOSAKA  Shinichi HARASE  Shoji IZUMIYA  Takehiko ADACHI  
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pp.329-334  PAPER
Highly Stable and Low Phase-Noise Oven-Controlled Crystal Oscillators (OCXOS) Using Dual-Mode Excitation
Yasuaki WATANABE  Kiyoharu OZAKI  Shigeyoshi GOKA  Takayuki SATO  Hitoshi SEKIMOTO  
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pp.335-346  PAPER
Sampling Jitter and Finite Aperture Time Effects in Wideband Data Acquisition Systems
Haruo KOBAYASHI  Kensuke KOBAYASHI  Masanao MORIMURA  Yoshitaka ONAYA  Yuuich TAKAHASHI  Kouhei ENOMOTO  Hideyuki KOGURE  
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pp.347-353  PAPER
Wide-Input Range Linear Voltage-to-Current Converter Using Equivalent MOSFETs without Cutoff Region
Kazuyuki WADA  Shigetaka TAKAGI  Nobuo FUJII  
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pp.354-359  PAPER
Operational Transconductance Amplifier with Rail-to-Rail Input Stage Using Single Channel Type MOSFETs
Takahide SATO  Shigetaka TAKAGI  
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pp.360-365  PAPER
Analog Inverter with Neuron-MOS Transistors and Its Application
Motoi INABA  Koichi TANNO  Okihiko ISHIZUKA  
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pp.366-372  PAPER
An On-Chip Power-on Reset Circuit for Low Voltage Technology
Takeo YASUDA  Masaaki YAMAMOTO  
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pp.373-380  PAPER
Fully On-Chip Active Guard Band Circuit for Digital Noise Cancellation
Shigetaka TAKAGI  Retdian Agung NICODIMUS  Kazuyuki WADA  Nobuo FUJII  
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pp.381-388  PAPER
Image Segmentation/Extraction Using Nonlinear Cellular Networks and Their VLSI Implementation Using Pulse-Modulation Techniques
Hiroshi ANDO  Takashi MORIE  Makoto MIYAKE  Makoto NAGATA  Atsushi IWATA  
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pp.389-394  PAPER
Analog Hardware Implementation of a Mathematical Model of an Asynchronous Chaotic Neuron
Jun MATSUOKA  Yoshifumi SEKINE  Katsutoshi SAEKI  Kazuyuki AIHARA  
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pp.395-398  LETTER
A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain
Kenichi SUZUKI  Mitsuhiro TAKEDA  Atsushi KAMO  Hideki ASAI  
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pp.399-402  LETTER
A CMOS Floating Resistor Circuit Having Both Positive and Negative Resistance Values
Takao OURA  Teru YONEYAMA  Shashidhar TANTRY  Hideki ASAI  
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Regular Section

pp.403-413  PAPER-Digital Signal Processing
A Bit-Rate Adaptive Coding System Based on Lossless DCT
Somchart CHOKCHAITAM  Masahiro IWAHASHI  Pavol ZAVARSKY  Noriyoshi KAMBAYASHI  
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pp.414-421  PAPER-Analog Signal Processing
Extension of Current Conveyor Concept and Its Applications
Takahide SATO  Kazuyuki WADA  Shigetaka TAKAGI  Nobuo FUJII  
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pp.422-431  PAPER-Systems and Control
Passification of Non-square Linear Systems Using an Input-dimensional Dynamic Feedforward Compensator
Young I. SON  Hyungbo SHIM  Kyoung-cheol PARK  Jin H. SEO  
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pp.432-446  PAPER-Numerical Analysis and Optimization
Reliability Optimization Design Using Hybrid NN-GA with Fuzzy Logic Controller
ChangYoon LEE  Mitsuo GEN  Yasuhiro TSUJIMURA  
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pp.447-454  PAPER-Algorithms and Data Structures
An Energy-Efficient Initialization Protocol for Wireless Sensor Networks with No Collision Detection
Raghuvel Subramaniam BHUVANESWARAN  Jacir Luiz BORDIM  Jiangtao CUI  Naohiro ISHII  Koji NAKANO  
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pp.455-462  PAPER-Graphs and Networks
Optimal Diagnosable Systems on Cayley Graphs
Toru ARAKI  Yukio SHIBATA  
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pp.463-471  PAPER-Information Security
A Gray Level Watermarking Algorithm Using Double Layer Hidden Approach
Shih-Chang HSIA  I-Chang JOU  Shing-Ming HWANG  
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pp.472-480  PAPER-Information Security
New Product-Sum Type Public-Key Cryptosystems with Selectable Encryption Key Based on Chinese Remainder Theorem
Kiyoko KATAYANAGI  Yasuyuki MURAKAMI  Masao KASAHARA  
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pp.481-484  PAPER-Information Security
A New Traitor Tracing
Shigeo MITSUNARI  Ryuichi SAKAI  Masao KASAHARA  
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pp.485-489  PAPER-Coding Theory
An Efficient Heuristic Search Method for Maximum Likelihood Decoding of Linear Block Codes Using Dual Codes
Tomotsugu OKADA  Manabu KOBAYASHI  Shigeichi HIRASAWA  
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pp.490-496  PAPER-Coding Theory
Adjacent Double Bit Error Correcting Codes with Single Byte Error Detecting Capability for Memory Systems
Ganesan UMANESAN  Eiji FUJIWARA  
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pp.497-504  PAPER-Neural Networks and Bioengineering
A Near-Optimum Parallel Algorithm for Bipartite Subgraph Problem Using the Hopfield Neural Network Learning
Rong-Long WANG  Zheng TANG  Qi-Ping CAO  
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pp.505-507  LETTER-Circuit Theory
A Low-Jitter Delay-Locked Loop with Harmonic-Lock Prevention
Sungkyung PARK  Changsik YOO  Sin-Chong PARK  
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pp.508-512  LETTER-VLSI Design Technology and CAD
Parallel Evolutionary Design of Constant-Coefficient Multipliers
Dingjun CHEN  Takafumi AOKI  Naofumi HOMMA  Tatsuo HIGUCHI  
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pp.513-517  LETTER-Coding Theory
Single Byte Error Correcting Codes with Double Bit within a Block Error Correcting Capability for Memory Systems
Ganesan UMANESAN  Eiji FUJIWARA  
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pp.518-521  LETTER-Communication Theory and Signals
On Sampling and Quantization for Signal Detection
Chao-Tang YU  Pramod K. VARSHNEY  
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pp.522-525  LETTER-Neural Networks and Bioengineering
A Method of Learning for Multi-Layer Networks
Zheng TANG  Xu Gang WANG  
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