Zhi Liang WANG

Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs
Zhi Liang WANG Osami WADA Takashi HARADA Takahiro YAGUCHI Yoshitaka TOYOTA Ryuji KOGA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2005/08/01
Vol. E88-B  No. 8  pp. 3176-3181
Type of Manuscript:  Special Section PAPER (Special Section of 2004 International Symposium on Electromagnetic Compatibility)
Category: Printed Circuit Boards
power bus stack and modelingcavity-mode modelvia interconnectEMI
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