Yutaka MASUDA


Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization
TaiYu CHENG Yutaka MASUDA Jun NAGAYAMA Yoichi MOMIYAMA Jun CHEN Masanori HASHIMOTO 
Publication:   
Publication Date: 2022/03/01
Vol. E105-A  No. 3  pp. 497-508
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
mode-wise voltage-scalingactivation-aware slack assignmentmulti-corner multi-modedownhill simplex method
 Summary | Full Text:PDF

Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling
Yutaka MASUDA Jun NAGAYAMA TaiYu CHENG Tohru ISHIHARA Yoichi MOMIYAMA Masanori HASHIMOTO 
Publication:   
Publication Date: 2022/03/01
Vol. E105-A  No. 3  pp. 509-517
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
critical path isolationbit-width scalingvoltage over-scalingapproximate computing
 Summary | Full Text:PDF

Approximate Minimum Energy Point Tracking and Task Scheduling for Energy-Efficient Real-Time Computing
Takumi KOMORI Yutaka MASUDA Jun SHIOMI Tohru ISHIHARA 
Publication:   
Publication Date: 2022/03/01
Vol. E105-A  No. 3  pp. 518-529
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
minimum energy point tracking (MEPT)dynamic voltage and frequency scaling (DVFS)adaptive body biasing (ABB)real-time operating system (RTOS)soft real-time scheduling
 Summary | Full Text:PDF

Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation
Naoki HATTORI Jun SHIOMI Yutaka MASUDA Tohru ISHIHARA Akihiko SHINYA Masaya NOTOMI 
Publication:   
Publication Date: 2021/11/01
Vol. E104-A  No. 11  pp. 1477-1487
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Systems)
Category: 
Keyword: 
neural networkoptical circuitmulti-layer perceptronwavelength division multiplexing
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MTTF-Aware Design Methodology of Adaptively Voltage Scaled Circuit with Timing Error Predictive Flip-Flop
Yutaka MASUDA Masanori HASHIMOTO 
Publication:   
Publication Date: 2019/07/01
Vol. E102-A  No. 7  pp. 867-877
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
adaptive voltage scalingactivation-aware slack assignmentmean time to failuretiming error predictive FF
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Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors
Yutaka MASUDA Takao ONOYE Masanori HASHIMOTO 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7  pp. 1452-1463
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
electrical timing errorsoftware-based error detectionEDM transformationerror detection
 Summary | Full Text:PDF