Yuko HARA-AZUMI


A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers
Takahiro YAMAMOTO Ittetsu TANIGUCHI Hiroyuki TOMIYAMA Shigeru YAMASHITA Yuko HARA-AZUMI 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7  pp. 1496-1499
Type of Manuscript:  Special Section LETTER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
approximate computingarray multipliersSMT solver
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Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs
Ittetsu TANIGUCHI Junya KAIDA Takuji HIEDA Yuko HARA-AZUMI Hiroyuki TOMIYAMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/11/01
Vol. E97-D  No. 11  pp. 2827-2834
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
many-core SoCsapplication mappingsystem-level designembedded systems
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Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips
Trung Anh DINH Shigeru YAMASHITA Tsung-Yi HO Yuko HARA-AZUMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2668-2679
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
flow-based microfluidic biochiparchitectural synthesisbindingschedulingclique
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Static Mapping of Multiple Data-Parallel Applications on Embedded Many-Core SoCs
Junya KAIDA Yuko HARA-AZUMI Takuji HIEDA Ittetsu TANIGUCHI Hiroyuki TOMIYAMA Koji INOUE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/10/01
Vol. E96-D  No. 10  pp. 2268-2271
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
many-core SoCsapplication mappingsystem-level designembedded systems
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Selective Check of Data-Path for Effective Fault Tolerance
Tanvir AHMED Jun YAO Yuko HARA-AZUMI Shigeru YAMASHITA Yasuhiko NAKASHIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/08/01
Vol. E96-D  No. 8  pp. 1592-1601
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology
Keyword: 
low powerfault-tolerant computingFU array
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