Yuichiro TAKEI


A 40-Gb/s 88 ATM Switch LSI Using 0. 25-µmCMOS/SIMOX
Yusuke OHTOMO Sadayuki YASUDA Masafumi NOGAWA Jun-ichi INOUE Kimihiro YAMAKOSHI Hirotoshi SAWADA Masayuki INO Shigeki HINO Yasuhiro SATO Yuichiro TAKEI Takumi WATANABE Ken TAKEYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5  pp. 737-745
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: Network
Keyword: 
SOICMOSATMhigh-speed
 Summary | Full Text:PDF

An Effective Routing Methodology for Gb/s LSIs Using Deep-Submicron Technology
Takumi WATANABE Yusuke OHTOMO Kimihiro YAMAKOSHI Yuichiro TAKEI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/04/25
Vol. E81-A  No. 4  pp. 677-684
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
routing methodologymaze routerlayoutCADVLSI
 Summary | Full Text:PDF

A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarECLstandard cellCADSDH
 Summary | Full Text:PDF

A Global Router Optimizing Timing and Area for High-Speed Bipolar LSIs
Ikuo HARADA Yuichiro TAKEI Hitoshi KITAZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/12/25
Vol. E77-A  No. 12  pp. 2058-2066
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
global routingtiming driven layoutbipolar LSIdelay modelrouting graphcritical path
 Summary | Full Text:PDF