Yuan-Chu YU

VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design
Lan-Da VAN Chin-Teng LIN Yuan-Chu YU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/08/01
Vol. E90-A  No. 8  pp. 1644-1652
Type of Manuscript:  PAPER
Category: Digital Signal Processing
channel densityhigh density voice over packethigh throughputlow-computation cyclepower efficiencyrecursive DFT/IDFT
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