Yoshitsugu INOUE

A Programmable Geometry Processor with Enhanced Four-Parallel SIMD Type Processing Core for PC-Based 3D Graphics
Hiroyuki KAWAI Yoshitsugu INOUE Junko KOBARA Robert STREITENBERGER Hiroaki SUZUKI Hiroyasu NEGISHI Masatoshi KAMEYAMA Kazunari INOUE Yasutaka HORIBA Kazuyasu FUJISHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Vol. E85-C  No. 5  pp. 1200-1210
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
3D graphics, programmable, geometry, SIMD, clip test, 
 Summary | Full Text:PDF(1.7MB)
A Highly Parallel DSP Architecture for Image Recognition
Hiroyuki KAWAI Yoshitsugu INOUE Rebert STREITENBERGER Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/08/25
Vol. E78-A  No. 8  pp. 963-970
Type of Manuscript:  Special Section PAPER (Special Section on Digital Signal Processing)
Category: 
Keyword: 
image recognition, SIMD, DSP, architecture, 
 Summary | Full Text:PDF(727.1KB)
A 100-MHz 2-D Discrete Cosine Transform Core Processor
Shin-ichi URAMOTO Yoshitsugu INOUE Akihiko TAKABATAKE Jun TAKEDA Yukihiro YAMASHITA Hideyuki TERANE Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/04/25
Vol. E75-C  No. 4  pp. 390-397
Type of Manuscript:  Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium)
Category: 
Keyword: 
 Summary | Full Text:PDF(759KB)