Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C
No. 4
pp. 557-565
Type of Manuscript:
Special Section PAPER (Special Issue on Circuit Technologies for Memory and Analog LSIs)
Category:
Keyword:
CMOS, high speed, cache SRAM, chip floor plan, sense amplifier, output register, setup/hold time, |