Yoshiji KOBAYASHI


A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarECLstandard cellCADSDH
 Summary | Full Text:PDF

A 15-Gbit/s Si-Bipolar Gate Array
Ryuusuke KAWANO Minoru TOGASHI Chikara YAMAGUCHI Yoshiji KOBAYASHI Masao SUZUKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9  pp. 1203-1209
Type of Manuscript:  Special Section PAPER (Special Issue on Ultra-High-Speed Electron Devices)
Category: 
Keyword: 
decision circuit4 : 1 multiplexertemperature-compensated output bufferSST-1C
 Summary | Full Text:PDF