Yoshihide KOMATSU

A 0.6-V Adaptive Voltage Swing Serial Link Transmitter Using Near Threshold Body Bias Control and Jitter Estimation
Yoshihide KOMATSU Akinori SHINMYO Mayuko FUJITA Tsuyoshi HIRAKI Kouichi FUKUDA Noriyuki MIURA Makoto NAGATA 
Publication:   
Publication Date: 2020/10/01
Vol. E103-C  No. 10  pp. 497-504
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Electronic Circuits
Keyword: 
adaptive voltage, transmitter, forward-body-bias (FBB), self-adjusted, threshold voltage, aggressor, jitter estimation, process-voltage-temperature (PVT), clock data recovery (CDR), 
 Summary | Full Text:PDF
Transceiver Macro with Spread-Spectrum Clocking Capability for AC-Coupled Cable Interfaces
Takefumi YOSHIKAWA Yoshihide KOMATSU Tsuyoshi EBUCHI Takashi HIRATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9  pp. 1444-1452
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation)
Category: 
Keyword: 
interface, spread-spectrum clocking, AC coupling, 
 Summary | Full Text:PDF
Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias
Yoshihide KOMATSU Koichiro ISHIBASHI Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 692-698
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
substrate noise, random variability, forward body bias, self adjusted, impurities, latch-up, CMOS, SoC, 
 Summary | Full Text:PDF
Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond
Koichiro ISHIBASHI Tetsuya FUJIMOTO Takahiro YAMASHITA Hiroyuki OKADA Yukio ARIMA Yasuyuki HASHIMOTO Kohji SAKATA Isao MINEMATSU Yasuo ITOH Haruki TODA Motoi ICHIHASHI Yoshihide KOMATSU Masato HAGIWARA Toshiro TSUKADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 250-262
Type of Manuscript:  INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: 
Keyword: 
low power, CMOS, SoC, 90 nm, low voltage, variability, 
 Summary | Full Text:PDF
Soft Error Hardened Latch Scheme with Forward Body Bias in a 90-nm Technology and Beyond
Yoshihide KOMATSU Yukio ARIMA Koichiro ISHIBASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 384-391
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Soft Error
Keyword: 
cosmic-ray, critical charge, forward body bias, alpha-particles, soft error rate, 
 Summary | Full Text:PDF