Yoshichika FUJIOKA


Design of a Reconfigurable Parallel Processor for Digital Control Using FPGAs
Yoshichika FUJIOKA Michitaka KAMEYAMA Nobuhiro TOMABECHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/07/25
Vol. E77-C  No. 7  pp. 1123-1130
Type of Manuscript:  Special Section PAPER (Special Issue on Super Chip for Intelligent Integrated Systems)
Category: 
Keyword: 
delay timemulti-operand multiply-additionreconfigurationdigital controlFPGA
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