Yoshiaki ASAO


A Comprehensive Model for Write Disturbance in Resistive Memory Composed of Cross-Point Array
Yoshiaki ASAO Fumio HORIGUCHI 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3  pp. 329-339
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
bit error rate (BER)resistive memorycross-point arraywrite disturbancesimplified circuiterror correcting code (ECC)
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A Precise Model for Cross-Point Memory Array
Yoshiaki ASAO Fumio HORIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/01/01
Vol. E99-C  No. 1  pp. 119-128
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
cross-pointsimplified circuitMonte Carlo simulationread disturbancewrite error
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Fault-Tolerant Designs for 256 Mb DRAM
Toshiaki KIRIHATA Yohji WATANABE Hing WONG John K. DEBROSSE Munehiro YOSHIDA Daisuke KATO Shuso FUJII Matthew R. WORDEMAN Peter POECHMUELLER Stephen A. PARKE Yoshiaki ASAO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/07/25
Vol. E79-C  No. 7  pp. 969-977
Type of Manuscript:  Special Section PAPER (Special Issue on the 1995 Symposium on VLSI Circuits (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.31, No.4 April 1996))
Category: Memory
Keyword: 
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