Yohei UMEKI


A 28-nm 484-fJ/writecycle 650-fJ/readcycle 8T Three-Port FD-SOI SRAM for Image Processor
Haruki MORI Yohei UMEKI Shusuke YOSHIMOTO Shintaro IZUMI Koji NII Hiroshi KAWAGUCHI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8  pp. 901-908
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
image memorymulti-port SRAM8TFD-SOI28-nmmajority logic
 Summary | Full Text:PDF

STT-MRAM Operating at 0.38V Using Negative-Resistance Sense Amplifier
Yohei UMEKI Koji YANAGIDA Shusuke YOSHIMOTO Shintaro IZUMI Masahiko YOSHIMOTO Hiroshi KAWAGUCHI Koji TSUNODA Toshihiro SUGII 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2411-2417
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
STT-MRAMlow-voltageprocess-variation-tolerant
 Summary | Full Text:PDF