Yohei KUME


A 90 nm 4848 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations
Kazutoshi KOBAYASHI Kazuya KATSUKI Manabu KOTANI Yuuri SUGIHARA Yohei KUME Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10  pp. 1919-1926
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Low-Power and High-Performance VLSI Circuit Technology
Keyword: 
variation-awarereconfigurable deviceFPGAyieldDFM
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